LTC4359 datasheet(3/20 Pages) LINER

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LTC4359

Rev D

For more information www.analog.com

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2. All currents into pins are positive; all voltages are referenced to

VSS unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VIN

Operating Supply Range

IIN

IN Current

IN = 12V

IN = OUT = 12V, SHDN = 0V

IN = OUT = 24V, SHDN = 0V

IN = −40V

150

–15

200

–40

µA

IOUT

OUT Current

IN = 12V, In Regulation

IN = 12V, ∆VSD = −1V

IN = OUT = 12V, SHDN = 0V

IN = OUT = 24V, SHDN = 0V

OUT = 12V, IN = SHDN = 0V

120

0.8

7.5

220

µA

ISOURCE

SOURCE Current

IN = 12V, ∆VSD = −1V

IN = SOURCE = 12V, SHDN = 0V

SOURCE = –40V

–0.4

150

–0.8

200

–1.5

µA

∆VGATE

Gate Drive (GATE–SOURCE)

IN = 4V, IGATE = 0, −1µA

IN = 8V to 80V; IGATE = 0, –1µA

4.5

5.5

∆VSD

Source-Drain Regulation Voltage (IN –OUT) ∆VGATE = 2.5V

IGATE(UP)

Gate Pull-Up Current

GATE = IN, ∆VSD = 0.1V

–6

–10

–14

µA

IGATE(DOWN) Gate Pull-Down Current

Fault Condition, ∆VGATE = 5V, ∆VSD = −1V

Shutdown Mode, ∆VGATE = 5V, ∆VSD = 0.7V

0.6

130

180

tOFF

Gate Turn-Off Delay Time

∆VSD = 0.1V to −1V, ∆VGATE < 2V,

CGATE = 0pF

0.3

0.5

µs

tON

Gate Turn-On Delay Time

IN = 12V, SOURCE = OUT = 0V, SHDN = 0V to 2V

∆VGATE > 4.5V, CGATE = 0pF

200

µs

VSHDN(TH) SHDN Pin Input Threshold

IN = 4V to 80V

0.6

1.2

VSHDN(FLT) SHDN Pin Float Voltage

IN = 4V to 80V

0.6

1.75

2.5

ISHDN

SHDN Pin Current

SHDN = 0.5V, LTC4359I, LTC4359C

SHDN = 0.5V, LTC4359H

SHDN = −40V

Maximum Allowable Leakage, VIN = 4V

–1

–0.5

–0.4

–3

–0.8

100

–5

–1.5

µA

VSOURCE(TH) Reverse SOURCE Threshold for GATE Off

GATE = 0V, IGATE(DOWN) = 1mA

–0.9

–1.8

–2.7

The l denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C, IN = 12V, SOURCE = IN, unless otherwise noted.

Note 3. An internal clamp limits the OUT pin to a minimum of 100V above

VSS. Driving this pin with more current than 1mA may damage the device.

Note 4. An internal clamp limits the GATE pin to a minimum of 10V above

IN or 100V above VSS. Driving this pin to voltages beyond the clamp may

damage the device.

ELECTRICAL CHARACTERISTICS

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