LTC2000 datasheet(5/14 Pages) LINER

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dc2085afb

DEMO MANUAL DC2085

QUICK START PROCEDURE

ANALOG OUTPUT NETWORK

The analog output network of the DC2085 has been

designed to maximize the performance of the LTC2000.

The LTC2000 drives two 50Ω resistors on each side to

minimize the impedance it sees. This maximizes the SFDR

the DAC is able to produce. If a larger signal swing is

required this impedance can be increased, but the SFDR

might degrade. The output also has a pi network of 50Ω

resistors to pad the output impedance of the board up to

50Ω per side. This allows the demo board to drive a 50Ω

analyzer through a balun or other combiner.

Linear Technology has various coupon boards for specific

frequenciesandapplications.Moreinformationisavailable

at www.linear.com.

SAMPLE CLOCK

The sample clock to the DC2085 demonstration circuit

board is marked J4. As a default it is a single-ended 50Ω

input port. There is an onboard balun that does a single-

ended to differential translation.

For the best noise performance, the sample input must

be driven with a very low jitter signal generator source.

The amplitude should be as large as possible up to ±1.8V

or 9dBm.

SOFTWARE

The software for the DC2085, LTDACGen is available at

www.linear.com free of charge. It simplifies the creation

of complex waveforms and loading them into the FPGA to

test the DC2085. For more information about how to use

the LTDACGen software, refer to the help files that come

with the software.

RESULTS

After everything is set up and the software is con-

nected to the DAC demo system, a sine wave can be

added to the output waveform. The default frequency is

399.932861328MHz (Figure 3). By clicking Update FPGA,

the data is sent to the FPGA and is then used to program

the DAC. A spectrum analyzer can then be used to view

the results (Figure 4).

Figure 3. Default Frequency

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