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ADL5320ARKZ-R7 bảng dữ liệu(PDF) 13 Page - Analog Devices

tên linh kiện ADL5320ARKZ-R7
Giải thích chi tiết về linh kiện  RF Driver Amplifier
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ADL5320ARKZ-R7 bảng dữ liệu(HTML) 13 Page - Analog Devices

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Data Sheet
ADL5320
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
Figure 35 shows the recommended land pattern for the ADL5320.
To minimize thermal impedance, the exposed paddle on the
SOT-89 package underside is soldered down to a ground plane
along with Pin 2. If multiple ground layers exist, stitch them
together using vias. For more information on land pattern design
and layout, refer to the Application Note AN-772, A Design and
Manufacturing Guide for the Lead Frame Chip Scale Package
(LFCSP).
The land pattern on the ADL5320 evaluation board provides a
measured thermal resistance (θJA) of 35°C/W. To measure θJA, the
temperature at the top of the SOT-89 package is found with an
IR temperature gun. Thermal simulation suggests a junction
temperature 10°C higher than the top of the package temperature.
With additional ambient temperature and input/output power
measurements, θJA can be determined.
1.50mm
3.00mm
1.80mm
0.86mm
0.762mm
0.635mm
0.86mm
0.20mm
Figure 35. Recommended Land Pattern
Rev. B | Page 13 of 20



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