MP4060GS datasheet(20/25 Pages) MPS

20 / 25 page

MP4060—TRIAC Dimmable PFC, PSC LED Controller for 200-265VAC LEDs

MP4060 Rev. 1.0

www.MonolithicPower.com

5/27/2015

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

For trailing-edge dimmers, the waveforms are

shown in Figure 13.

Figure 13—Trailing-edge dimmer waveforms

The MP4060 detects the dimming turn-on cycle

through MULT. Based on the turn-on cycle, the

control circuitry adjusts the internal reference

voltage. MULT voltage exceeding VMULT_ON is

recognized as a dimmer turn-on signal. MULT

voltage below VMULT_OFF is recognized as a

dimmer turn-off signal. The MP4060 has a 30

percent line-cycle-detection blanking time at each

line cycle. The real phase detector output is

added to this blanking time to determine the

reference voltage. If it is higher than 100 percent,

the reference voltage is clamped to 100 percent

(see Figure 14). This means if the turn-on cycle

exceeds 70 percent of the line cycle, the

reference maintains the maximum value, which

means the maximum output current with different

dimmers is almost the same as the rated output

current.

Figure14—Dimming turn-on cycle detector

The internal reference voltage decreases when

the turn-on cycle decreases to less than 70

percent of the line cycle, lowering the output

current. As the dimming turn-on cycle decreases,

the COMP voltage decreases. For a leading-

edge dimmer, once the COMP voltage reaches

VCOMPL_LD, it is clamped. The output current

decreases slowly to maintain the TRIAC holding

current and avoid random flicker. Figure15 shows

the

relationship

between

the

leading-edge

dimming turn-on phase and the output current.

Figure 15—Leading-edge dimming curve

For a trailing-edge dimmer, there is no holding

current. The COMP voltage is clamped at a lower

level (VCOML_TL) to get a deeper dimming depth.

Figure 16 shows the relationship between the

trailing-edge dimming turn-on phase and the

output current.

Figure 16:—Trailing-edge dimming curve

Dimming Pull-Down Current Source

There are three kinds of dimming pull-down

current sources in MP4060. The IDP_TL current

source is for trailing-edge dimming, the other two

(weak/strong) current sources are for leading-

edge dimming. The dimming pull-down current is

used to pull down the rectified line voltage to zero

quickly to avoid a mis-detection on MULT.

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