MP4032-2—OFFLINE LED DRIVER WITH FULLY-INTEGRATED INTERNAL MOSFET

MP4032-2 Rev.1.01

www.MonolithicPower.com

13

10/23/2014

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+

Vcc

ZCD

Auxiliary Winding

0.35V

Valley

signal

Figure 4: Zero-Current Detector

As a result, there are virtually no switch turn-on

losses and no output diode reverse-recover

losses. It ensures high efficiency and low EMI

noise.

Real-Current Control

The proprietary real-current control allows the

MP4032-2 to control the LED current by sampling

the inductor current information through the CS

sensing resistor. The mean output LED current is

approximately:





FB

o

s

V

I

2R

Where:

0.403V)

CS pin and GND.

Auto Start

The MP4032-2 integrates an auto starter. The

starter begins a timer when the MOSFET turns

on. If ZCD fails to send out another turn-on signal

after 130µs, the starter will automatically send a

turn-on

signal

to

avoid

unnecessary

IC

shutdowns from a missed zero-current detection.

Minimum Off Time

The MP4032-2 operates with variable switching

frequency. The frequency changes with the

instantaneous input line voltage. To limit the

maximum

frequency

and

improve

EMI

performance, the MP4032-2 employs an internal

minimum off-time limiter, with a minimum off-time

of 5.3µs.

Leading-Edge Blanking

An internal leading-edge blanking (LEB) unit is

employed between the CS pin and the current

comparator input to prevent the switching pulse

from prematurely terminating due to parasitic

capacitance discharge when the MOSFET turns

on. During the blanking time, the path from the

CS pin to the current comparator input is blocked.

Figure 5 shows the leading-edge blanking.

Figure 5: Leading-Edge Blanking

Output Over-Voltage Protection (OVP)

Output over-voltage protection can prevent

component damage during an over-voltage

condition. Since the auxiliary winding’s positive

voltage plateau is proportional to the output

voltage, OVP uses the auxiliary winding voltage

through the ZCD over-voltage detector instead of

directly monitoring the output voltage. The OVP

sampling unit is shown in Figure 6. Once the

ZCD pin voltage exceeds 5.3V, the OVP signal

triggers and latches, the gate driver turns off, and

the IC functions in quiescent mode until the VCC

voltage drops to 7.5V, which causes the system

to restart. The output OVP setting point can be

calculated as:







AUX

ZCD2

OUT _ OVP

L

ZCD1

ZCD2

NR

V5.3V

NR

R

threshold,