MP9447–HIGH-EFFICIENCY, FAST-TRANSIENT, SYNCHRONOUS, STEP-DOWN CONVERTER

MP9447 Rev. 1.2

www.MonolithicPower.com

17

1/5/2016

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2016 MPS. All Rights Reserved.

LAYOUT RECOMMENDATION

1. Place high-current paths (GND, IN, and SW)

very close to the device with short, direct, and

wide traces.

2. Place input capacitors on both VIN sides

(PIN8 and PIN19) and as close to the IN and

GND pins as possible.

3. Place the decoupling capacitor as close to

the VCC and GND pins as possible.

4. Keep the switching node SW short and away

from the feedback network.

5. Place the external feedback resistors next to

the FB pin. Do not place vias on the FB trace.

6. Keep the BST voltage path (BST, C3, and

SW) as short as possible.

7. Connect the bottom IN and SW pads to a

large copper area to achieve better thermal

performance.

8. A Four-layer layout is strongly recommended

to achieve better thermal performance.

C2A

C2B

Top Layer

Inner1 Layer

Inner2 Layer

Bottom Layer

Figure 10: PCB Layout