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MP8867 bảng dữ liệu(PDF) 12 Page - Monolithic Power Systems |
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MP8867 bảng dữ liệu(HTML) 12 Page - Monolithic Power Systems |
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12 / 27 page ![]() MP8867 – SYNCHRONOUS STEP-DOWN CONVERTER MP8867 Rev.1.01 www.MonolithicPower.com 12 2/21/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. PIN FUNCTIONS QFN14 PIN# Name Description 1 BST Bootstrap. Requires a capacitor between SW and BST to form a floating supply across the high-side switch driver. 2 SW Switch output. Connect using a wide PCB trace. 3 SCL I 2C serial clock. 4 SDA I 2C serial data. 5 EN/SYNC EN/SYNC high to enable the MP8867. EN/SYNC has an internal 5.4µA pull-up current of 5V, so the MP8867 can start up automatically when EN/SYNC is floating. Apply an external clock to EN/SYNC to change the switching frequency. 6 A0 I 2C address set. Let A0 float or pull it to VCC to set one address. Pull A0 to ground to set a different address. 7 PG Power good indication. PG is an open-drain structure. PG switches low if the output voltage is out of the regulation window. PG indicates UV conditions only. 8 PGND System power ground. PGND is the reference ground of the regulated output voltage. PGND requires special consideration during PCB layout. Connect to ground plane with copper traces and vias. 9 VIN Supply voltage. The MP8867 operates on a 4.5V to 17V input rail. VIN requires a ceramic capacitor to decouple the input rail. Connect using a wide PCB trace. 10 VOUT Sense input of the output voltage. Connect VOUT to the positive loading terminal. 11 FB Feedback. Connect FB to the tap of an external resistor divider from the output to GND to set the output voltage in the FB control loop. 12 SS Soft start. Connect a capacitor from SS to ground to set the soft-start time. 13 VCC Internal LDO regulator output. Decouple with a 0.47µF capacitor. 14 AGND Signal ground. AGND is not connected directly to system ground internally. Make sure AGND connects to system ground in the PCB layout. |
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