ACT8846 datasheet(41/44 Pages) ACTIVE-SEMI

41 / 44 page

ACT8846

Rev 7.0 06-Dec-2017

Innovative PowerTM

41 -

www.active-semi.com

ActivePMUTM is a trademark of Active-Semi.

I2CTM is a trademark of NXP.

CMI 107: ACT8846QM107

CMI107 is optimized to power the Cortex A7 processor.

Sequencing

Rail

VSET0

Voltage

(V)

VSET1

Volt-

age (V)

Sequencing

Input Trigger

StartUp

Delay

(us)

Soft-

Start

(us)

OUT1

1.8

OUT7

400

OUT2

0.9

GPIO1

500

400

OUT3

1.2

OUT11

500

400

OUT4

3.0

I2C

400

OUT5

3.3

n/a

I2C

140

OUT6

1.8

n/a

I2C

140

OUT7

1.8

n/a

OUT2

500

140

OUT8

3.3

n/a

OUT3

500

140

OUT9

3.3

n/a

OUT8

1000

140

OUT10

3.3

n/a

OUT8

500

100

OUT11

2.5

n/a

OUT1

500

100

OUT12

3.3

n/a

I2C

100

OUT13

1.8

n/a

Always On

100

Hardware Configuration

PWRHLD and PWREN must be connected together in CMI 107.

GPIO1 must be directly connected to OUT13 in CMI 107.

Startup

The ACT8846QM107-T has two startup sequences. The first is pushbutton startup. Asserting nPBIN low

starts the startup sequence. nPBIN must stay low until after PWRHLD and PWREN are asserted high by

an external source, usually a uP. If nPBIN goes high before PWRHLD goes high, the IC shuts down all

outputs. The second startup sequence is with the PWREN and PWRHLD pins. After input power is ap-

plied, asserting PWREN high starts the startup sequence. Note that nPBIN should stay high in this appli-

cation. In both startup conditions, OUT4/5/6/12 are off by default, but can be enabled via I2C

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