ACT510X datasheet(21/37 Pages) ACTIVE-SEMI

21 / 37 page

ACT510x

Rev 1.0, 04-Apr-2018

REG 0x00: Main Control 1 (R/W) (VM)

Bit

Name

Description

Comment

HIZ

0: Not in HIZ mode

1: In HIZ mode

Bit to control if IC is in HIZ mode.

RFU

WATCHDOG_RESET

0: Normal

1: Reset

I2C Watchdog Timer Reset

This must be written to 1 before Watchdog timer expires,

if Watchdog timer is enabled. This is auto clearing when

writing to a 1.

Audio Frequency Limit

0: No limit

1: Minimum 40kHz

0: No limit of switching frequency

1: Set minimum switching frequency to 40kHz to avoid

audio noise

REGISTER_RESET

1: Reset Registers to

Default

set reset register back to 0.

REG 0x01: Main Control 2 (R/W) (NVM)

Bit

Name

Description

Comment

RFU

DIS_OCP_SHUTDO

0: Enable

1: Disable

If set to 0, the device will be disabled if FET cycle by

cycle current limit is detected for 8 (or 16) continuous

cycles. Uses the FET_LIMIT register setting for the FET

ILIM.

DIS_VIN_OVP

0: Enable

1: Disable

When set to 1, a VIN_OVP fault does not latch off the

charger in a fault mode.

Charger will restart

automatically when the OVP condition is removed.

FET_ILIMIT

0: 8.5A

1: 10A

This is the cycle by cycle current limit setting for ALL

FETS in any operating mode:

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