MPQ8633B – 16V, 20A, SYNCHRONOUS, STEP-DOWN CONVERTER

MPQ8633B Rev. 1.01

www.MonolithicPower.com

16

8/3/2017

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Output Voltage Tracking and Reference

The MPQ8633B provides an analog input pin

(TRK/REF) to track another power supply or

accept an external reference. When an external

voltage signal is connected to TRK/REF, it acts

as a reference for the MPQ8633B output

voltage. The FB voltage follows this external

voltage signal exactly, and the soft-start

settings are ignored. The TRK/REF input signal

can be in the range of 0.3V to 1.4V. During the

initial start-up, the TRK/REF must reach at least

600mV first to ensure proper operation. After

that, it can be set to any value between 0.3V

and 1.4V.

Pre-Bias Start-Up

The MPQ8633B is designed for monotonic

start-up into pre-biased loads. If the output is

pre-biased to a certain voltage during start-up,

the IC disables switching for both the HS-FET

and LS-FET until the voltage on the TRK/REF

capacitor exceeds the sensed output voltage at

FB. Before the TRK/REF voltage reaches the

pre-biased FB level, if the BST voltage (from

BST to SW) is lower than 2.3V, the LS-FET is

turned on to allow the BST voltage to be

charged through VCC. The LS-FET is turned on

for very narrow pulses, so the drop in the pre-

biased level is negligible.

Output Voltage Discharge

When the MPQ8633B is disabled through EN,

output voltage discharge mode is enabled. This

causes both the HS-FET and the LS-FET to

latch off. A discharge FET connected between

SW and PGND is turned on to discharge the

output voltage. The typical switch on resistance

of this FET is about 80Ω. Once the FB voltage

drops below 10%*REF, the discharge FET is

turned off.

Current Sense and Over-Current Protection

(OCP)

The MPQ8633B features an on-die current

sense and a programmable positive current

limit threshold.

The current limit is active when the MPQ8633B

is enabled. During the LS-FET on state, the SW

current (inductor current) is sensed and

voltage is proportional to the SW current cycle-

by-cycle. The HS-FET is only allowed to turn on

limit the SW valley current cycle-by-cycle.

Calculate the current limit threshold setting from

OCP

CS

IN

O

O

CS

LIM

IN

s

V

R( )

(V

V ) V

1

G(I

)

V2 L f











(3)

the desired output current limit (A).

The OCP hiccup is active 3ms after the

MPQ8633B is enabled. Once OCP hiccup is

active, if the MPQ8633B detects the over-

current condition for 31 consecutive cycles, or if

FB drops below the under-voltage protection

(UVP) threshold, it enters hiccup mode. In

hiccup mode, the MPQ8633B latches off the

HS-FET immediately, and latches off the LS-

FET after ZCD is detected. Meanwhile, the

TRK/REF capacitor is also discharged. After

about 11ms, the MPQ8633B attempts to soft

start automatically. If the over-current condition

still remains after 3ms of running, the

MPQ8633B repeats this operation cycle until

the over-current condition disappears, and the

output voltage rises back to the regulation level

smoothly.

Negative Inductor Current Limit

When the LS-FET detects a -10A current, the

MPQ8633B turns off the LS-FET for 200ns to

limit the negative current.

Output Sinking Mode (OSM)

The MPQ8633B employs output sinking mode

(OSM) to regulate the output voltage to the

targeted value. When the FB voltage is higher

than 104%*REF but is below the OVP threshold,

OSM is triggered. During OSM operation, the

LS-FET remains on until it reaches the -6.4A

current limit. The LS-FET is then turned off

momentarily for 200ns before turning on again.

The MPQ8633B repeats this operation until FB

drops below 102%*REF. The MPQ8633B exits

OSM after 15 consecutive cycles of forced

CCM.