Preliminary Datasheet

LP6282

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LP6282–00 Version 0.1 SET.-2017

Functional Pin Description

Pin NO.

Pin Name

Description

1,4,11,16

GND

Ground.

2

REF

Reference Voltage Output. Connect a ceramic capacitor between REF and GND.

3

FBN

VGL Charge-Pump Regulator Feedback Input. Connect to an external resistive voltage

divider from the VGL to REF to set the output voltage.

5

DRVN

VGL Charge-Pump Regulator Driver Output.

6

DRVP

VGH Charge-Pump Regulator Driver Output.

7

AVDD

Source Driver Power. This supplies the Charge-Pump and OPA power source.

8

VS

Power Source of VGH regulator.

9

FBP

VGH Charge-Pump Regulator Feedback Input. Connect to an external resistive

voltage divider from the VGH to GND to set the output voltage.

10

OPO

Unity-Gain OP Output pin.

12

OPI

Unity-Gain OP Input pin.

13

CTRL

External Power Switch Control Pin.

14

EN

Enable Pin.

15

LX

Boost Regulator Switching Node. Connect the inductor and the schottky diode to LX.

17

FB

Boost Regulator Feedback Input. Connect to an external resistive voltage divider from

the output to FB to set the output voltage.

18

BSW

Boost Power Source Switch Control.

19

VIN

Supply Input. The input voltage range is between 2.5V to 5.5V. Connect a ceramic

capacitor between VIN and GND.

20

DLY

AVDD to VGL Delay Time Setup Pin. Connect a capacitor between DLY and GND.

EP

Exposed pad. Connect this pin to other GND pin.