LP6230B datasheet(6/7 Pages) POWER

6 / 7 page

LP6230B

May.-2014

Email: marketing@lowpowersemi.com

www.lowpowersemi.com

Page 6 of 7

Preliminary Datasheet

LP6230B

Operation Information

The LP6230B uses a fixed frequency, peak current

mode boost regulator architecture to regulate voltage

at the feedback pin. At the start of each oscillator

cycle the MOSFET is turned on through the control

circuitry. To prevent sub-harmonic oscillations at

duty cycles greater than 50 percent, a stabilizing

ramp is added to the output of the current sense

amplifier and the result is fed into the negative input

of the PWM comparator. When this voltage equals

The output voltage of the error amplifier the power

MOSFET is turned off. The voltage at the output of

the error amplifier is an amplified version of the

difference between the 0.6V bandgap reference

voltage and the feedback voltage. In this way the

peak current level keeps the output in regulation. If

the feedback voltage starts to drop, the output of the

error amplifier increases. These results in more

current to flow through the power MOSFET, thus

increasing the power delivered to the output.

TheLP6230B has internal soft start to limit the

amount of input current at startup and to also limit the

amount of overshoot on the output.

Setting the Output Voltage

Set the output voltage by selecting the resistive

voltage divider ratio. The voltage divider drops the

output voltage to the 0.6V feedback voltage. Use a

100K resistor for R2 of the voltage divider. Determine

the high-side resistor R1 by the equation:

VOUT = ( R1 / R2 + 1 ) x VFB

VOUT = ( R1 / R2 + 1 ) x 0.6V

LP6230B bảng dữ liệu(PDF) 6 Page - Lowpower Semiconductor inc