CS5530A datasheet(41/259 Pages) NSC

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Functional Description

The Geode CS5530A I/O companion provides many sup-

port functions for a GX-series processor (i.e., GX1, GXLV,

GXm). This chapter discusses the detailed operations of

the CS5530A in two categories: system-level activities and

operations/programming of the major functional blocks.

The system-level discussion topics revolve around events

that affect the device as a whole unit and as an interface

with other chips (e.g., processor): Topics include:

• Processor Interface

— Display Subsystem Connections

— PSERIAL Pin Interface

• PCI Bus Interface

— PCI Initiator

—PCI Target

— Special Bus Cycles–Shutdown/Halt

—PCI Bus Parity

— PCI Interrupt Routing Support

— Delayed Transactions

• Resets and Clocks

—Resets

—ISA Clock

—DOT Clock

• Power Management

— CPU Power Management

— APM Support

— Peripheral Power Management

All of the major functional blocks interact with the processor

through the PCI bus, or via its own direct interface. The

major functional blocks are divided out as:

• PC/AT Compatibility Logic

— ISA Subtractive Decode

— ISA Bus Interface

— ROM Interface

— Megacells

— I/O Ports 092h and 061h System Control

— Keyboard Interface Function

— External Real-Time Clock Interface

• IDE Controller

—IDE Interface Signals

— IDE Configuration Registers

• XpressAUDIO

— Subsystem Data Transport Hardware

— VSA Technology Support Hardware

• Display Subsystem Extensions

— Video Interface Configuration Registers

— Video Accelerator

— Video Overlay

—Gamma RAM

— Display Interface

• Universal Serial Bus Support

— USB PCI Controller

— USB Host Controller

— USB Power Management

Note that this Functional Description section of the data

book describes many of the registers used for configuration

of the CS5530A; however, not all registers are reported in

detail. Some tables in the following subsections show only

the bits (not the entire register) associated with a specific

function being discussed. For access, register, and bit

information regarding all CS5530A registers refer to Sec-

tion 4.0 "Register Descriptions" on page 140.

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