CTS9513API-2 datasheet(22/28 Pages) ETC

22 / 28 page

Celeritous Technical Services Corp

800.687.6510 / 806.793.0708

3308 34th St

FAX

806.793.0710

Lubbock, Texas 79410

http://www.celeritous.com

SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE

Rev E

Tuesday, September 25,

CTS9513-2

5 Chan 16 bit 20MHz Counter/Timer

MODE S GATE CONTROLLED STROBE

In Mode S, once ARMed the counter will count to TC

twice and disarm. During this time the State of the

Gate line determines whether the counter is loaded

from the Load or Hold Register. The Gate line does

not affect or initiate the counter in this Mode. Its only

action is a level sensitive selection of the Load or

Hold Register as a counter reload source.

As shown in Figure 26, at each TC in the cycle, if the

Gate line is high, the counter will be reloaded from

the Hold Register. If it is Low the counter is reloaded

from the Load Register.

SOURCE

DATA

ARM COMMAND

GATE

COUNT VALUE

TC OUTPUT

TOGGLE OUTPUT

L-1

L-2

...

H-1

H-2

...

L-1

COUNTER MODE S WAVEFORMS

Figure 26 - CTS9513 Counter Mode S Representative Waveforms

SOURCE

DATA

ARM COMMAND

GATE

COUNT VALUE

TC OUTPUT

TOGGLE OUTPUT

H-1

H-2

H-1

H-2

L-1

L-2

H-1

COUNTER MODE V WAVEFORMS

Figure 27 - CTS9513 Counter Mode V Representative Waveforms

MODE V FREQUENCY SHIFT KEYING

Mode V is similar to mode S in that the Gate line act

to select which register the counter is reloaded from,

but counts continuously once armed. If the Toggled

output is used, the output may be used to switch

between two frequencies determined by the Load

and Hold Count values and the state of the Gate line

as shown in Figure 27. This is used in Frequency

Shift Keying (FSK) applications.

NOTE: This mode does not function

correctly in current devices. Please

see the ERRATA section for more

information

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