CS5345 datasheet(33/39 Pages) CIRRUS

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CS5345

6.8.2

Analog Input Selection (Bits 2:0)

Function:

These bits are used to select the input source for the PGA and ADC. Please see Table 11 below.

6.9

Active Level Control - Address 0Ch

6.9.1

Active High/Low (Bit 0)

Function:

When this bit is set, the INT pin will function as an active high CMOS driver.

When this bit is cleared, the INT pin will function as an active low open drain driver and will require an

external pull-up resistor for proper operation.

6.10 Interrupt Status - Address 0Dh

For all bits in this register, a ‘1’ means the associated interrupt condition has occurred at least once

since the register was last read. A ‘0’ means the associated interrupt condition has NOT occurred

since the last reading of the register. Status bits that are masked off in the associated mask register

will always be ‘0’ in this register. This register defaults to 00h.

6.10.1 Clock Error (Bit 3)

Function:

Indicates the occurrence of a clock error condition.

Table 10. PGA Soft Cross or Zero Cross Mode Selection

PGASoft

PGAZeroCross

Mode

Changes to affect immediately

Zero Cross enabled

Soft Ramp enabled

Soft Ramp and Zero Cross enabled (default)

Table 11. Analog Input Multiplexer Selection

Sel2

Sel1

Sel0

PGA/ADC Input

Microphone Level Inputs (+32 dB Gain Enabled)

Line Level Input Pair 1

Line Level Input Pair 2

Line Level Input Pair 3

Line Level Input Pair 4

Line Level Input Pair 5

Line Level Input Pair 6

Reserved

76543

210

Reserved

Active_H/L

76543

210

Reserved

ClkErr

Reserved

Ovfl

Undrfl

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