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M69AW048B bảng dữ liệu(PDF) 24 Page - STMicroelectronics |
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M69AW048B bảng dữ liệu(HTML) 24 Page - STMicroelectronics |
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24 / 29 page ![]() M69AW048B 24/29 Table 13. Standby/Power-Down Mode AC Characteristics Note: 1. Applicable also to Power-up. 2. Applicable when 4Mb, 8Mb and 16Mb PAR mode is programmed 3. Some data might be written into any address location if tEHWL (min) is not satisfied. 4. The Input Transition Time (t τ) at AC testing is 5ns as shown below. If actual tτ is longer than 5ns, it may violate AC specification of some timing parameters. Figure 22. Power Down Program AC Waveforms Note: 1. E2 = High. 2. All address inputs must be High from Cycle 1 to Cycle 5. 3. PDCADD stands for Power-Down Configuration Address. It must be compliant with the format specified in Table 6 otherwise the data programmed during the Power-Down Program sequence may be incorrect. 4. PDCDAT stands for Power-Down Configuration Data. It must be compliant with the format specified in Table 5 otherwise the data programmed during the Power-Down Program sequence may be incorrect. 5. tEHEL after the end of Cycle 6, the Power Down Program is completed and the device returns to normal operation. Symbol Alt. Parameter M69AW048B Unit Min Max tCLEX tCSP E2 Low Setup Time for Power Down Entry 10 ns tEXCH tC2LP E2 Low Hold Time after Power Down Entry 70 ns tEHEV (1) tCHH E1 High Hold Time following E2 High after Power- Down Exit (Deep Power-Down Mode only) 300 µs tCHEL (2) tCHHP E1 High Hold Time following E2 High after Power- Down Exit (not in Deep Power-Down Mode) 1µs tEHCH tCHS E1 High Setup Time following E2 High after Power- Down Exit 0µs tEHGL tCHOX E1 High to G Invalid Time for Standby Entry 10 ns tEHWL (3) tCHWX E1 High to W Invalid Time for Standby Entry 10 ns t τ (4) t τ Input Transition Time 1 25 ns AI07225c A0-A20 E1 W DQ0-DQ15 MSB 2 G MSB 2 MSB 2 MSB 2 MSB 2 PDCADD3 LB, UB tAXAV tAXAVL 4 tAVAX RDa RDa RDa 00 PDCD4 RDb Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 Cycle 6 |
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