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MM54HC4511 bảng dữ liệu(PDF) 4 Page - National Semiconductor (TI) |
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MM54HC4511 bảng dữ liệu(HTML) 4 Page - National Semiconductor (TI) |
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4 / 6 page ![]() INPUTS A B C D (Pins 7 1 2 6) BCD data inputs A (pin 7) is the least-significant data bit and D (pin 6) is the most significant bit Hexadecimal data A – F at these inputs will cause the outputs to assume a logic low offering an alternate method of blanking the display OUTPUTS a–g Decoded buffered outputs These outputs unlike the 4511 have CMOS drivers which will produce typical CMOS output voltage levels CONTROLS BI (Pin 4) Active-low display blanking input A logic low on this input will cause all outputs to be held at a logic low thereby blanking the display LT is the only input that will override the Bl input LT (Pin 3) Active-low lamp test A low logic level on this input causes all outputs to assume a logic high This input allows the user to test all segments of a display with a single control input This input is independent of all other inputs LE (Pin 5) Latch enable input This input controls the 4-bit transparent latch A logic high on this input latches the data present at the A B C and D inputs a logic low allows the data to be transmitted through the latch to the decoder Output Characteristics (VCCe5V) TLF5373 – 2 The expected minimum curves are not guarantees but are design aids TLF5373 – 3 Typical Applications TLF5373 – 4 Typical Common Cathode LED Connection TLF5373 – 5 Incandescent Bulb Driving Circuit 4 |
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