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KL5KUSB201 bảng dữ liệu(PDF) 8 Page - List of Unclassifed Manufacturers

tên linh kiện KL5KUSB201
Giải thích chi tiết về linh kiện  USB2.0 Compliant Transceiver Chip
PDF  21 Pages
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KL5KUSB201 bảng dữ liệu(HTML) 8 Page - List of Unclassifed Manufacturers

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Kawasaki USB device
KL5KUSB201
Datasheet (digest) rev 1.1E page 8/21
Copyright © 2002 Kawasaki Microelectronics Inc. Kawasaki LSI Inc. All rights reserved.
3. Application Example
Example of system configuration using KL5KUSB201 is shown in figure 3. To realize
the USB device application, other than the LSI, SIE PHY control and function logic are
needed.
Also suitable resistors such as Rpu, Rs and Rext and 48MHz clock oscillator or crystal
and related parts are required.
Figure 3
Application Example
USB201
UDP
Rpu
Endpoint
Buffer
USB201
Controller
UDM
Rs
osc
48MHz
Function
Function
Function
Function
Logic
Logic
Logic
Logic
HS_SIE
Rs
Rext
4. Pinout Diagram
Symbol block of KL5KUSB201 is shown in Figure 4. The LSI has two interfaces –
USB bus and SIE bus. USB related bus signals are shown in the left side of the
symbol block, while SIE bus signal is in the right side. SIE control signals select LSI
operation mode. These signals are FS_HSN, PU_SE0N, MODE, CRCACT, SUSPN
and RSTN. USB bus status signals are BSTAT. CRCERR and RXERR are receiving
error indicators. SIE_DAT is bi-directional bus. Signal direction and valid timing are
controlled by RXACT, RXVLD, TXACT, TXRDY and WDVLD.



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