AL2100-DS01-405-R datasheet(34/52 Pages) BOARDCOM

34 / 52 page

AL2100

Preliminary Data Sheet

11/11/02

Broa d c om Co rp o r a ti o n

Page 26

100base-Tx PHY Registers

Document

AL2100-DS01-405-R

PHY IDENTIFIER 2 REGISTER

RECEIVE ERROR COUNTER

POWER MANAGEMENT REGISTER

Table 25: Register 3: PHY Identifier 2 Register Bit Description

Bit

Name

Description

Mode

Default

15:10

OUI

Assigned to Bits 19 through 24 of the OUI.

010101

9:4

Model Number

6-bit manufacturer’s model number.

010010

3:0

Revision Number

4-bit manufacturer’s revision number.

0001

Note

Based on an OUI of 0010A9 (Hex).

When this register is used as Next Page Message, the bit definition is the same as Register 7.

Table 26: Register 21: Receive Error Counter Bit Description

Bit

Name

Description

Mode

Default

15:0

RX_ER Counter

Count receive error events.

Table 27: Register 22: Power Management Register Bit Description

Bit

Name

Description

Mode

Default

15:14

Reserved

PD_PLL

1 = Power down PLL circuit.

PD_EQUAL

1 = Power down equalizer circuit.

Reserved

PD_LP

1 = Power down link pulse receiver.

PD_EN_DET

1 = Power down energy detect circuit.

PD_FX

1 = Power down FX circuit.

7:6

Reserved

MSK_PLL

0 = Force power up PLL circuit.

MSK_EQUAL

0 = Force power up equalizer circuit.

Reserved

MSK_LP

0 = Force power up link pulse receiver.

MSK_EN_DET

0 = Force power up energy detect circuit.

MSK_FX

0 = Force power up FX circuit.

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