S29CD032J datasheet(3/74 Pages) CYPRESS

3 / 74 page

Document Number: 002-00948 Rev. *C

Page 3 of 74

S29CD032J

S29CD016J

S29CL032J

S29CL016J

Contents

Ordering Information ................................................... 4

1.1 Valid Combinations ........................................................ 5

Input/Output Descriptions

and Logic Symbols ...................................................... 6

Block Diagram.............................................................. 7

Block Diagram of Simultaneous

Read/Write Circuit........................................................ 8

Physical Dimensions/Connection Diagrams............. 9

5.1 80-Pin PQFP Connection Diagram ................................ 9

5.2 PQR080–80-Lead Plastic Quad Flat

Package Physical Dimensions..................................... 10

5.3 80-Ball Fortified BGA Connection Diagram ................. 11

5.4 Special Package Handling Instructions........................ 11

5.5 LAA080–80-ball Fortified Ball Grid Array

(13 x 11 mm) Physical Dimensions.............................. 12

5.6 LAD080–80-ball Fortified Ball Grid Array

(11 x 9 mm) Physical Dimensions................................ 13

Product Overview ...................................................... 14

6.1 Memory Map ................................................................ 14

Device Operations ..................................................... 19

7.1 Device Operation Table ............................................... 19

7.2 Asynchronous Read..................................................... 20

7.3 Hardware Reset (RESET#).......................................... 21

7.4 Synchronous (Burst) Read Mode

and Configuration Register .......................................... 21

7.5 Autoselect .................................................................... 26

7.6 VersatileI/O (VIO) Control............................................. 27

7.7 Program/Erase Operations .......................................... 27

7.8 Write Operation Status................................................. 32

7.9 Reset Command .......................................................... 36

Advanced Sector Protection/Unprotection ............. 37

8.1 Advanced Sector Protection Overview ........................ 38

8.2 Persistent Protection Bits............................................. 39

8.3 Persistent Protection Bit Lock Bit................................. 41

8.4 Dynamic Protection Bits............................................... 41

8.5 Password Protection Method ....................................... 42

8.6 Hardware Data Protection Methods............................. 43

Secured Silicon Sector Flash Memory Region ....... 44

9.1 Secured Silicon Sector Protection Bit .......................... 45

9.2 Secured Silicon Sector Entry

and Exit Commands...................................................... 45

10. Electronic Marking...................................................... 46

11. Power Conservation Modes....................................... 46

11.1 Standby Mode............................................................... 46

11.2 Automatic Sleep Mode.................................................. 46

11.3 Hardware RESET# Input Operation.............................. 46

11.4 Output Disable (OE#).................................................... 46

12. Electrical Specifications............................................. 47

12.1 Absolute Maximum Ratings .......................................... 47

13. Operating Ranges....................................................... 48

14. DC Characteristics...................................................... 49

14.1 Zero Power Flash.......................................................... 50

15. Test Conditions ........................................................... 51

16. Test Specifications ..................................................... 51

16.1 Switching Waveforms ................................................... 51

17. AC Characteristics...................................................... 52

17.1 VCC and VIO Power-up.................................................. 52

17.2 Asynchronous Operations............................................. 52

17.3 Synchronous Operations .............................................. 54

17.4 Hardware Reset (RESET#)........................................... 56

17.5 Write Protect (WP#)...................................................... 57

17.6 Erase/Program Operations ........................................... 57

17.7 Alternate CE# Controlled

Erase/Program Operations ........................................... 62

17.8 Erase and Programming Performance ......................... 63

17.9 PQFP and Fortified BGA Pin Capacitance ................... 63

18. Appendix 1 .................................................................. 64

18.1 Common Flash Memory Interface (CFI) ....................... 64

19. Appendix 2 .................................................................. 67

19.1 Command Definitions.................................................... 67

20. Revision History.......................................................... 69

Sales, Solutions, and Legal Information .......................... 74

Worldwide Sales and Design Support ........................... 74

Products ........................................................................ 74

PSoC® Solutions .......................................................... 74

Cypress Developer Community ..................................... 74

Technical Support ......................................................... 74

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