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CS7615 bảng dữ liệu(PDF) 7 Page - Cirrus Logic

tên linh kiện CS7615
Giải thích chi tiết về linh kiện  CCD IMAGER ANALOG PROCESSOR
PDF  36 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS7615 bảng dữ liệu(HTML) 7 Page - Cirrus Logic

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CS7615
DS231PP6
7
The EAV/SAV code definitions are consistent with
an 8-bit data path. As per the ITU-656 recommen-
dation, the LSB’s of the CS7615 are fractional bits
which are not used when delivering 8-bit output da-
ta. In 10-bit mode, all ten digital outputs can be
connected directly to the CS7665.
The output data format from the CS7615 formatter
is shown in Figure 6. The CS7615 also outputs two
clocks, one at the pixel rate and the other at 2× the
output pixel data rate (see pin description for
CLK2XO).
The output of the formatter is avail-
able at the pins DO[0..9] and it transitions at the fall-
ing edge of the pixel rate clock CLKO. Figure 7
shows the basic output timing diagram. The falling
edges of CLKO lag the falling edges of CLK2XO
by 4 to 8 ns and both clocks have approximately
50% duty cycles.
HREF
4T
NbT
4T
AV*T
Blanking period
Active video
EAV code (10 bits)
Smpl.
Word
0
3FFh
1
000h
2
000h
3
Binary
1
fv1P3P2P1P000
Blank code (10 bits)
Smpl.
Word
4
040h
repeat above word
SAV code (10 bits)
Smpl.
Word
0
3FFh
1
000h
2
000h
3
Binary
1
fv0P3P2P1P000
During active video,
f = field bit; 0 (odd field), 1 (even field)
v = vertical blanking bit; 0 (active video lines), 1(vertical blanking)
P3P2P1P0 = error protection bits (as per ITU-656).
T = output pixel period
samples of mosaic data;
during vertical blanking,
040h.
At reset or power down, 040h.
Figure 6. CS7615 Output Data Format



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