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HAR2425 bảng dữ liệu(PDF) 24 Page - Micronas

tên linh kiện HAR2425
Giải thích chi tiết về linh kiện  High-Precision Dual-Die Programmable Linear Hall-Effect Sensor Family
PDF  33 Pages
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nhà sản xuất  MICRONAS [Micronas]
Trang chủ  http://www.micronas.com
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HAR2425 bảng dữ liệu(HTML) 24 Page - Micronas

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HAR 24xy
DATA SHEET
24
July 14, 2015; DSH000170_001EN
Micronas
4.9. Characteristics
at TJ = 40 °C to +170 °C, VSUP1=VSUP2 = 4.5 V to 5.5 V, GND1=GND2=GNDePad = 0 V after programming and
locking, at Recommended Operating Conditions if not otherwise specified in the column “Conditions”.
Typical Characteristics for TJ = 25 °C and VSUP = 5 V.
Symbol
Parameter
Pin
Min.
Typ.
Max.
Unit
Conditions
ISUP
Supply Current
over Temperature Range
VSUPx
710
mA
Resolution5)
OUTx
12
bit
HAR 2425: ratiometric to VSUP
1)
HAR 2455: depends on PWM
Period
tr(O)
HAR 2425: Step Response Time
of Output6)
OUTx
0.5
0.6
ms
CL = 10 nF, time from 10% to 90%
of final output voltage for a step
like signal Bstep from 0 mT to Bmax
HAR 2455: Response Time of
Output2)6)
OUTx
1.5
2.5
4.5
8.5
1.8
3
5.4
10.2
ms
fPWM = 2 kHz
fPWM = 1 kHz
fPWM = 500 Hz
fPWM = 250 Hz
DNL
Differential Non-Linearity of D/A
Converter4)
OUTx
0.9
0
0.9
LSB
Test limit at 25 °C ambient
temperature
INL
Non-Linearity of Output Voltage
over Temperature6)
OUTx
0.3
0.3
%VSUP
2)For V
out = 0.35 V ... 4.65 V;
VSUP = 5 V ; Linear Setpoint
Characteristics
ER
Ratiometric Error of Output
over Temperature
(Error in VOUT / VSUP)
OUTx
0.25
0.25
%
Max of [VOUT5  VOUT4.5 and
VOUT5.5  VOUT5] at VOUT = 10%
and 90% VSUP
Voffset
Offset Drift over Temperature
Range6)
VOUT(B = 0 mT)25°C
 V
OUT(B = 0 mT)max
OUTx
0
0.1
0.2
%VSUP VSUP = 5 V ; BARREL SHIFTER =
3 (±50 mT)
V
OUTCL
Accuracy of Output Voltage at
Clamping Low Voltage over
Temperature Range5)
OUTx
11
11
mV
RL = 5 k, VSUP = 5 V
Spec values are derived from
resolution of the registers
DAC_CMPHI/LO and Voffset.
V
OUTCH
Accuracy of Output Voltage at
Clamping High Voltage over
Temperature Range5)
OUTx
11
11
mV
VOUTH
Upper Limit of Signal Band3)
OUTx
93

%VSUP
VSUP = 5 V, 1 mA IOUT 1mA
VOUTL
Lower Limit of Signal Band3)
OUTx

7%VSUP
VSUP = 5 V, 1 mA IOUT 1mA
1) Output DAC full scale = 5 V ratiometric, Output DAC offset = 0 V, Output DAC LSB = V
SUP/4096
2) If more than 50% of the selected magnetic field range is used and the temperature compensation is suitable.
INL = VOUT - VOUTLSF with VOUTLSF = Least Square Fit through measured output voltage
3) Signal Band Area with full accuracy is located between V
OUTL and VOUTH. The sensor accuracy is reduced below VOUTL
and above VOUTH
4) External package stress or overmolding might change this parameter
5) Guaranteed by Design
6) Characterized on small sample size, not tested



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