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PSoC® 4: PSoC 4100S Plus

Datasheet

Document Number: 002-19966 Rev. *F

Page 17 of 42

GPIO

Table 4. GPIO DC Specifications

Spec ID#

Parameter

Description

Min

Typ

Max

Units

Details/

Conditions

SID57

VIH[3]

Input voltage high threshold

0.7



V

DDD

––

CMOS Input

SID58

VIL

Input voltage low threshold

–

0.3





VDDD

CMOS Input

SID241

VIH[3]

LVTTL input, VDDD < 2.7 V

0.7



V

DDD

––

–

SID242

VIL

LVTTL input, VDDD < 2.7 V

–

0.3





VDDD

–

SID243

VIH[3]

LVTTL input, VDDD  2.7 V

2.0

–

SID244

VIL

LVTTL input, VDDD  2.7 V

–

0.8

–

SID59

VOH

Output voltage high level

VDDD –0.6

–

IOH = 4mA at 3V VDDD

SID60

VOH

Output voltage high level

VDDD –0.5

–

IOH = 1 mA at 1.8 V

VDDD

SID61

VOL

Output voltage low level

–

0.6

IOL = 4 mA at 1.8 V

VDDD

SID62

VOL

Output voltage low level

–

0.6

IOL = 10 mA at 3 V VDDD

SID62A

VOL

Output voltage low level

–

0.4

IOL = 3mA at 3V VDDD

SID63

RPULLUP

Pull-up resistor

3.5

5.6

8.5

kΩ

–

SID64

RPULLDOWN

Pull-down resistor

3.5

5.6

8.5

–

SID65

IIL

Input leakage current (absolute

value)

––

25 °C, VDDD = 3.0 V

SID66

CIN

Input capacitance

–

SID67[4]

VHYSTTL

Input hysteresis LVTTL

–

VDDD  2.7 V

SID68[4]

VHYSCMOS

Input hysteresis CMOS

0.05 × VDDD

––

VDD < 4.5 V

SID68A[4]

VHYSCMOS5V5 Input hysteresis CMOS

200

–

VDD > 4.5 V

SID69[4]

IDIODE

Current through protection diode to

VDD/VSS

–

100

µA–

SID69A[4]

ITOT_GPIO

Maximum total source or sink chip

current

–

200

–

Notes

3. VIH must not exceed VDDD + 0.2 V.

4. Guaranteed by characterization.

Table 5. GPIO AC Specifications

(Guaranteed by Characterization)

Spec ID#

Parameter

Description

Min

Typ

Max

Units

Details/

Conditions

SID70

TRISEF

Rise time in fast strong mode

–

3.3 V VDDD, Cload =

25 pF

SID71

TFALLF

Fall time in fast strong mode

–

3.3 V VDDD, Cload =

25 pF

SID72

TRISES

Rise time in slow strong mode

–

3.3 V VDDD, Cload =

25 pF

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