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CIP3250A bảng dữ liệu(PDF) 23 Page - Micronas

tên linh kiện CIP3250A
Giải thích chi tiết về linh kiện  Component Interface Processor
PDF  44 Pages
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nhà sản xuất  MICRONAS [Micronas]
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CIP3250A bảng dữ liệu(HTML) 23 Page - Micronas

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ADVANCE INFORMATION
CIP 3250A
23
Micronas
Table 2–10: I2C-Bus operation, continued
Sub-
Address
(decimal)
Label
Bit No.
(LSB = 0)
Typical
Operation
Value
Function
I2C registers for ADJUSTABLE LOWPASS FILTER
05
LPFLUM
7–0
0
Y luma low pass filter selection
0 = bypass
128 = Y1 (<06>CYLUM1=0, <06>CYLUM2=0,
increment <16>YDEL by 1)
192 = Y2 (<06>CYLUM1=0, <06>CYLUM2=0,
increment <16>YDEL by 1)
224 = Y3 (<06>CYLUM1=0, <06>CYLUM2=0,
increment <16>YDEL by 2)
240 = Y4 (<06>CYLUM1=0, <06>CYLUM2=0,
increment <16>YDEL by 2)
241 = Y5 (<06>CYLUM1=0, <06>CYLUM2=0,
increment <16>YDEL by 2)
249 = Y6 (<06>CYLUM1=0, <06>CYLUM2=0,
increment <16>YDEL by 2)
255 = Y7 (<06>CYLUM1=0, <06>CYLUM2=0,
increment <16>YDEL by 2)
[note: <16>YDEL has to be incremented to match group delays]
06
CYLUM1
3
0
Y (luma) low pass filter offset correction 1
0 = off
1 = on
06
CYLUM2
2
0
Y (luma) low pass filter offset correction 2
0 = off
1 = on
07
LPFCHR
6–0
0
UV (chroma) low pass filter selection
0 = bypass
96 = UV1 (<06>CYCHR1=0, <06>CYCHR2=0)
97 = UV2 (<06>CYCHR1=0, <06>CYCHR2=0)
113 = UV3 (<06>CYCHR1=0, <06>CYCHR2=0)
125 = UV4 (<06>CYCHR1=0, <06>CYCHR2=0)
127 = UV5 (<06>CYCHR1=0, <06>CYCHR2=0)
06
CYCHR1
1
0
UV (chroma) low pass filter offset correction 1
0 = off
1 = on
06
CYCHR2
0
0
UV (chroma) low pass filter offset correction 2
0 = off
1 = on
I2C registers for DELAY2 (DL2)
17
PXSKWON
3
1
pixel skew correction (see section 2.5.)
0 = off
[note: delay adapted every field, see Fig. 2–15]
1 = on
[note: delay adapted every line, see Fig. 2–14]
21
DL2
7–0
69
delay adjust for RGB to YUV-path (see section 2.5.)
(0...255)*2 + 2 clocks delay to write DL2–FIFO if <17>PXSKWON = 1
(48...212) clocks delay to read DL2–FIFO if <17>PXSKWON = 0
I2C registers for DELAY1 (DL1)
10
SECAM
5
0
delay of digital YUVin (SECAM mode)
0 = see <10>DL1ON
1 = UV: 2 clocks, Y: 76 clocks (set <10>DL1ON = 0)
10
DL1ON
4
1
delay of digital YUVin (set <10>SECAM = 0)
0 = 2 clocks
1 = 80 clocks



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