CY28547LFXC datasheet(21/25 Pages) SILABS

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CY28547

.....................Document #: 001-05103 Rev *B Page 21 of 24

Test and Measurement Set-up

For Single-ended Signals and Reference

The following diagram shows test load configurations for the

single-ended PCI, USB, and REF output signals.

27M_NSS/27M_SS at 3.3V

TDC

Duty Cycle

Measurement at 1.5V

TPERIOD

Spread Disabled 27M Period

Measurement at 1.5V

37.0359

37.0381

Spread Enabled 27M Period

Measurement at 1.5V

37.0359

37.0381

TR / TF

Rising and Falling Edge Rate

Measured between 0.4V and 2.0V

1.0

4.0

V/ns

TCCJ

Cycle to Cycle Jitter

Measurement at 1.5V

–

200

LACC

27_M Long Term Accuracy

Measured at crossing point VOX

–50

ppm

REF

TDC

REF Duty Cycle

Measurement at 1.5V

TPERIOD

REF Period

Measurement at 1.5V

69.82033 69.86224

TPERIODAbs REF Absolute Period

Measurement at 1.5V

68.83429 70.84826

THIGH

REF High time

Measurement at 2V

29.97543 38.46654

TLOW

REF Low time

Measurement at 0.8V

29.57543 38.26654

TR / TF

REF Rising and Falling Edge Rate

Measured between 0.8V and 2.0V

1.0

4.0

V/ns

TSKEW

REF Clock to REF Clock

Measurement at 1.5V

–

500

TCCJ

REF Cycle to Cycle Jitter

Measurement at 1.5V

–

1000

LACC

Long Term Accuracy

Measurement at 1.5V

–

100

ppm

ENABLE/DISABLE and SET-UP

TSTABLE

Clock Stabilization from Power-up

–

1.8

TSS

Stopclock Set-up Time

10.0

–

AC Electrical Specifications (continued)

Parameter

Description

Condition

Min.

Max.

Unit

Figure 15.Single-ended Load Configuration Low Drive Option

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