HT66F005 datasheet(81/109 Pages) HOLTEK

81 / 109 page

Rev. 1.30

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Rev. 1.30

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HT66F005/HT66F006

Cost-Effective A/D Flash MCU with EEPROM

HT66F005/HT66F006

Cost-Effective A/D Flash MCU with EEPROM

Interrupts

Interruptsareanimportantpartofanymicrocontrollersystem.Whenanexternaleventoran

internalfunctionsuchasaTimerModuleoranA/Dconverterrequiresmicrocontrollerattention,

theircorrespondinginterruptwillenforceatemporarysuspensionofthemainprogramallowingthe

microcontrollertodirectattentiontotheirrespectiveneeds.Thedevicecontainsanexternalinterrupt

andinternalinterruptsfunctions.Theexternalinterruptisgeneratedbytheactionoftheexternal

INTpin,whiletheinternalinterruptsaregeneratedbyvariousinternalfunctionssuchastheTMs,

TimeBase,EEPROMandtheA/Dconverter.

Interrupt Registers

Overallinterruptcontrol,whichbasicallymeansthesettingofrequestflagswhencertain

microcontrollerconditionsoccurandthesettingofinterruptenablebitsbytheapplicationprogram,

iscontrolledbyaseriesofregisters,locatedintheSpecialPurposeDataMemory,asshowninthe

accompanyingtable.Thenumberofregistersdependsuponthedevicechosenbutfallintothree

categories.ThefirstistheINTC0~INTC1registerswhichsetuptheprimaryinterrupts,thesecond

istheMFI0~MFI1registerswhichsetuptheMulti-functioninterrupts.FinallythereisanINTEG

registertosetuptheexternalinterrupttriggeredgetype.

Eachregistercontainsanumberofenablebitstoenableordisableindividualinterruptsaswell

asinterruptflagstoindicatethepresenceofaninterruptrequest.Thenamingconventionofthese

followsaspecificpattern.Firstislistedanabbreviatedinterrupttype,thenthe(optional)numberof

thatinterruptfollowedbyeitheran“E”forenable/disablebitor“F”forrequestflag.

Function

Enable Bit

Request Flag

Notes

G�oba�

EMI

—

INT Pin

INTE

INTF

—

Mu�ti-function

MFnE

MFnF

n=0~1

�/D Conve�te�

�DE

�DF

—

Time Base

TBnE

TBnF

n=0~1

EEPROM

DEE

DEF

—

TnPE

TnPF

n=0~1

Tn�E

Tn�F

Interrupt Register Bit Naming Conventions

Interrupt Register List STOP HERE 19/12

Name

Bit

INTEG

—

INTS1

INTS0

INTC0

—

MF0F

TB0F

INTF

MF0E

TB0E

INTE

EMI

INTC1

TB1F

�DE

DEF

MF1F

TB1E

�DE

DEE

MF1E

MFI0

—

T0�F

T0PF

—

T0�E

T0PE

MFI1

—

T1�F

T1PF

—

T1�E

T1PE

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