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ATPL250A bảng dữ liệu(PDF) 10 Page - ATMEL Corporation

tên linh kiện ATPL250A
Giải thích chi tiết về linh kiện  ATPL Series Power Line Communications Device
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ATPL250A bảng dữ liệu(HTML) 10 Page - ATMEL Corporation

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ATPL250A [DATASHEET]
Atmel-43079F-ATPL250A-Datasheet_22-Sep-16
10
5.3
Zero-crossing detector
5.3.1
Overview
Zero Crossing Detector block works predicting future zero crossing in function of the past zero crossings. To achieve
this, the system embeds a configurable Input Signal Management (ISM) block and a PLL, both of which manage Zero
Crossing Detector Input Signal to calculate Zero Crossing Output Flag. The zero-cross detection of waves of 50 Hz
and 60 Hz with ±10% of error is supported.
The PLL block interprets its input signal such a way that it indicates a zero cross in the middle of a positive pulse. It is
important to note that depending on the external circuit which implements the Zero Crossing Detector Input Signal this
interpretation is not always correct. So for these cases it is required to transform the Input Signal in a signal where the
middle of a positive pulse corresponds to a truly zero cross. This transformation is implemented through the Input
Signal Management (ISM) configured by MODE_INV and MODE_REP fields in ZC_CONFIG register.
Zero Crossing Detector Input Signal (VZ CROSS) must fulfil some requirements. The first requirement is that VZ
CROSS signal must be a pulse train which its duty cycle must be >60% or <40% (polarity is configurable). In addition,
if we have to detect Ascent or Descent zero-crossing, Zero Crossing Detector Input Signal period must be equal than
period of the wave we need to obtain zero-crossing. Ascent and Descent Zero Crossing Detection are configured by
setting MODE_MUX and MODE_ASC fields in ZC_CONFIG register.
Figure 5-3.
Typical circuit, using a bidirectional optocoupler and a Schmitt trigger
The input signal “VZ CROSS”(wider line) generated by this circuit for Zero Cross Detection of the wave “L”-“N” (finer
line) is plotted in next figure. The digital signal at output of Input Signal Management (ISM) is plotted in Figure 5-4.
Figure 5-4.
Digital signal (dashed line) at output of Input Signal Management (ISM) internal block
Mains Signal
ZC signal provided
to VZ CROSS



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