IIS2DH datasheet(19/49 Pages) STMICROELECTRONICS

tên linh kiện	IIS2DH

Giải thích chi tiết về linh kiện	Ultra-low-power high-performance 3-axis accelerometer with digital output for industrial applications

PDF	49 Pages

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19 / 49 page

DocID027668 Rev 2

19/49

IIS2DH

Mechanical and electrical specifications

2.9

Factory calibration

The IC interface is factory calibrated for sensitivity (So) and zero-g level (TyOff).

The trim values are stored inside the device in non-volatile memory. Any time the device is

turned on, these values are downloaded into the registers to be used during active

operation. This allows using the device without further calibration.

2.10

FIFO

The IIS2DH contains a 10-bit, 32-level FIFO. Buffered output allows the following operation

modes: FIFO, Stream, Stream-to-FIFO and FIFO bypass. When FIFO bypass mode is

activated, FIFO is not operating and remains empty. In FIFO mode, measurement data from

acceleration detection on the x, y, and z axes are stored in the FIFO buffer.

2.11

Temperature sensor

The IIS2DH is supplied with an internal temperature sensor. Temperature data can be

enabled by setting the TEMP_EN[1:0] bits to ‘1’ in the TEMP_CFG_REG (1Fh) register.

To retrieve the temperature sensor data the BDU bit in CTRL_REG4 (23h) must be set to ‘1’.

Both the OUT_TEMP_L (0Ch), OUT_TEMP_H (0Dh) registers must be read.

Temperature data is stored inside OUT_TEMP_H as two’s complement data in 8-bit format

left-justified.

IIS2DH bảng dữ liệu(PDF) 19 Page - STMicroelectronics