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AD5337ARM bảng dữ liệu(PDF) 18 Page - Analog Devices

tên linh kiện AD5337ARM
Giải thích chi tiết về linh kiện  2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs
PDF  24 Pages
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Trang chủ  http://www.analog.com
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AD5337ARM bảng dữ liệu(HTML) 18 Page - Analog Devices

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AD5337/AD5338/AD5339
Rev. A | Page 18 of 24
READ OPERATION
When reading data back from the AD5337/AD5338/AD5339
DACs, the user begins with an address byte (R/W = 0), after
which the DAC acknowledges that it is prepared to receive data
by pulling SDA low. This address byte is usually followed by the
pointer byte, which is also acknowledged by the DAC. Then the
master initiates another start condition (repeated start) and the
address is resent with R/W = 1. This is acknowledged by the
DAC indicating that it is prepared to transmit data. Two bytes
of data are then read from the DAC as shown in Figure 34. A
stop condition follows. Note that in a read sequence, data bytes
are the same as those in the write sequence except that don’t
cares are read back as 0. However, if the master sends an ACK
and continues clocking SCL (no stop is sent), the DAC
retransmits the same two bytes of data on SDA. This allows
continuous read back of data from the selected DAC register.
Alternatively, the user may send a start followed by the address
with R/W = 1. In this case, the previously loaded pointer
settings are used and read back of data can begin immediately.
DATA BYTE
LEAST SIGNIFICANT DATA BYTE
00
0
1
1
A0
R/W
X
X
LSB
ACK
BY
AD533x
SCL
SDA
START
CONDITION
BY
MASTER
ACK
BY
AD533x
MSB
SCL
SDA
00
0
1
1
0
A0
R/W
MSB
REPEATED
START
CONDITION
BY
MASTER
ACK
BY
AD533x
ADDRESS BYTE
SCL
SDA
MSB
LSB
NO
ACK
BY
MASTER
STOP
CONDITION
BY
MASTER
POINTER BYTE
ADDRESS BYTE
0
ACK
BY
MASTER
LSB
Figure 34. Read Sequence



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