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PALLV22V10 bảng dữ liệu (PDF) - Lattice Semiconductor

PALLV22V10 Datasheet PDF - Lattice Semiconductor
tên linh kiện PALLV22V10
tải về  PALLV22V10 tải về
kích thước tập tin   378.8 Kbytes
Page   19 Pages
nhà sản xuất  LATTICE [Lattice Semiconductor]
Trang chủ  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor
Giải thích chi tiết về linh kiện Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device

PALLV22V10 Datasheet (PDF)

Go To PDF Page tải về bảng dữ liệu
PALLV22V10 Datasheet PDF - Lattice Semiconductor

tên linh kiện PALLV22V10
tải về  PALLV22V10 Click to download

kích thước tập tin   378.8 Kbytes
Page   19 Pages
nhà sản xuất  LATTICE [Lattice Semiconductor]
Trang chủ  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor
Giải thích chi tiết về linh kiện Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device

PALLV22V10 bảng dữ liệu (HTML) - Lattice Semiconductor


PALLV22V10 Thông tin chi tiết sản phẩm

GENERAL DESCRIPTION
The PALLV22V10 is an advanced PAL® device built with low-voltage, high-speed, electricallyerasable CMOS technology.
The PALLV22V10Z provides low voltage and zero standby power. At 30 µA maximum standby current, the PALLV22V10Z allows battery powered operation for an extended period. The PALLV22V10 device implements the familiar Boolean logic transfer function, the sum of products. The PAL device is a programmable AND array driving a fixed OR array. The AND array is programmed to create custom product terms, while the OR array sums selected terms at the outputs.
The product terms are connected to the fixed OR array with a varied distribution from 8 to 16 across the outputs (see Block Diagram). The OR sum of the products feeds the output macrocell. Each macrocell can be programmed as registered or combinatorial, and active high or active low. The output configuration is determined by two bits controlling two multiplexers in each macrocell.

DISTINCTIVE CHARACTERISTICS
◆ Low-voltage operation, 3.3 V JEDEC compatible
   — VCC = + 3.0 V to 3.6 V
◆ Commercial and industrial operating temperature range
◆ 7.5-ns tPD
◆ Electrically-erasable technology provides reconfigurable logic and full testability
◆ 10 macrocells programmable as registered or combinatorial, and active high or active low to match application needs
◆ Varied product term distribution allows up to 16 product terms per output for complex functions
◆ Global asynchronous reset and synchronous preset for initialization
◆ Power-up reset for initialization and register preload for testability
◆ Extensive third-party software and programmer support
◆ 24-pin SKINNY DIP and 28-pin PLCC packages save space




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