GENERAL DESCRIPTION
The ADN2817/ADN2818 provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 10 Mbps to 2.7 Gbps. The ADN2817/ADN2818 automatically lock to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are exceeded, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted.

FEATURES
   Serial data input: 10 Mbps to 2.7 Gbps
   Exceeds ITU-T jitter specifications
   Integrated limiting amplifier
      5 mV p-p sensitivity (ADN2817 only)
   Adjustable slice level: ±100 mV (ADN2817 only)
   Patented dual-loop clock recovery architecture
   Programmable LOS detect (ADN2817 only)
   Integrated PRBS generator and detector
   No reference clock required
   Loss of lock indicator
   Supports double data rate
   Bit error rate monitor (BERMON) or sample phase adjust options
   Rate selectivity without the use of a reference clock
   I2C interface to access optional features
   Single-supply operation: 3.3 V
   Low power
      650 mW (ADN2817)
      600 mW (ADN2818)
   5 mm × 5 mm 32-lead LFCSP

APPLICATIONS
   SONET OC-1, OC-3, OC-12, OC-48, and all associated FEC rates
   Fibre Channel, 2× Fibre Channel, GbE, HDTV
   WDM transponders
   Regenerators/repeaters
   Test equipment