General Description

The THC63LVD103D transmitter is designed to support pixel data transmission between Host and Flat Panel Display from NTSC up to 1080p(60Hz). The THC63LVD103D converts 35bits of CMOS/TTL data into LVDS(Low Voltage Differential Signaling) data stream. The transmitter can be programmed for rising edge or falling edge clocks through a dedicated pin. At a transmit clock frequency of 160MHz, 30bits of RGB data and 5bits of timing and control data (HSYNC, VSYNC, DE, CNTL1, CNTL2) are transmit ted at an effective rate of 1.12Gbps per LVDS channel.

Features

• Wide dot clock range: 8-160MHz suited for NTSC, VGA, SVGA, XGA,SXGA and SXGA+ and 1080p

• PLL requires no external components

• Supports spread spectrum clock generator

• On chip jitter filtering

• Clock edge selectable

• Supports reduced swing LVDS for low EMI

• Power down mode

• Low power single 3.3V CMOS design

• 64pin TQFP

• Pin compatible with THC63LVD103(30bits)