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TS80C51U2 bảng dữ liệu (PDF) - TEMIC Semiconductors

TS80C51U2 Datasheet PDF - TEMIC Semiconductors
tên linh kiện TS80C51U2
tải về  TS80C51U2 tải về
kích thước tập tin   316.17 Kbytes
Page   67 Pages
nhà sản xuất  TEMIC [TEMIC Semiconductors]
Trang chủ  http://www.temic.de
Logo TEMIC - TEMIC Semiconductors
Giải thích chi tiết về linh kiện Double UART 8-bit CMOS Microcontroller, 0-60 MHz

TS80C51U2 Datasheet (PDF)

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TS80C51U2 Datasheet PDF - TEMIC Semiconductors

tên linh kiện TS80C51U2
tải về  TS80C51U2 Click to download

kích thước tập tin   316.17 Kbytes
Page   67 Pages
nhà sản xuất  TEMIC [TEMIC Semiconductors]
Trang chủ  http://www.temic.de
Logo TEMIC - TEMIC Semiconductors
Giải thích chi tiết về linh kiện Double UART 8-bit CMOS Microcontroller, 0-60 MHz

TS80C51U2 bảng dữ liệu (HTML) - TEMIC Semiconductors


TS80C51U2 Thông tin chi tiết sản phẩm

Description
TEMIC TS80C51U2 is high performance CMOS ROM, OTP and EPROM versions of the 80C51 CMOS single chip 8-bit microcontroller.
The TS80C51U2 retains all features of the TEMIC 80C51 with extended ROM/EPROM capacity (16 Kbytes), 256 bytes of internal RAM, a 7-source , 4-level interrupt system, an on-chip oscilator and three timer/ counters.
In addition, the TS80C51U2 has a second UART, enhanced functions on both UART, enhanced timer 2, a hardware watchdog timer, a dual data pointer, a baud rate generator and a X2 speed improvement mechanism. The fully static design of the TS80C51U2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data.
The TS80C51U2 has 2 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial port and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative.

Features
● 80C52 Compatible
   • 8051 pin and instruction compatible
   • Four 8-bit I/O ports
   • Three 16-bit timer/counters
   • 256 bytes scratchpad RAM
● High-Speed Architecture
   • 40 MHz @ 5V, 30MHz @ 3V
   • X2 Speed Improvement capability (6 clocks/machine cycle)
      30 MHz @ 5V, 20 MHz @ 3V (Equivalent to
      60 MHz @ 5V, 40 MHz @ 3V)
● second UART
● Baud Rate Generator
● Dual Data Pointer
● On-chip ROM/EPROM (16K-bytes)
● Programmable Clock Out and Up/Down Timer/ Counter 2
● Hardware Watchdog Timer (One-time enabled with Reset-Out)
● Asynchronous port reset
● Interrupt Structure with
   • 7 Interrupt sources
   • 4 level priority interrupt system
● Full duplex Enhanced UARTs
   • Framing error detection
   • Automatic address recognition
● Low EMI (inhibit ALE)
● Power Control modes
   • Idle mode
   • Power-down mode
   • Power-off Flag
● Once mode (On-chip Emulation)
● Power supply: 4.5-5.5V, 2.7-5.5V
● Temperature ranges: Commercial (0 to 70oC) and Industrial (-40 to 85oC)
● Packages: PDIL40, PLCC44, VQFP44 1.4, CQPJ44 (window), CDIL40 (window)




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