Ultra-low power consumption technology
• VDD = single power supply voltage of 1.8 to 3.6 V
• HALT mode
• STOP mode
• SNOOZE mode
RL78 CPU core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be
changed from high speed (0.04167 us: @ 24 MHz
operation with high-speed on-chip oscillator clock)
to ultra-low speed (30.5 us: @ 32.768 kHz
operation with subsystem clock)
• Multiply/divide and multiply/accumulate
instructions are supported.
• Address space: 1 MB
• General-purpose registers: (8-bit register x 8) x 4 banks
• On-chip RAM: 5.5 KB