Ultra-low power consumption technology
• VDD = single power supply voltage of 1.9 to 5.5 V
• HALT mode
• STOP mode
• SNOOZE mode
RL78 CPU core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed from
high speed (0.04167 μs: @ 24 MHz operation with highspeed
on-chip oscillator) to ultra-low speed (30.5 μs: @ 32.768 kHz operation with subsystem clock)
• Multiply/divide/multiply & accumulate instructions are supported.
• Address space: 1 MB
• General-purpose registers: (8-bit register × 8) × 4 banks
• On-chip RAM: 6 KB or 8 KB
Code flash memory
• Code flash memory: 64 KB or 128 KB
• Block size: 1 KB
• Prohibition of block erase and rewriting (security function)
• On-chip debug function
• Self-programming (with boot swap function/flash shield
window function)
High-speed on-chip oscillator
• Select from 24 MHz (TYP.), 12 MHz (TYP.), 6 MHz (TYP.),
and 3 MHz (TYP.)
• High accuracy: ±1.0 % (VDD = 1.9 to 5.5 V, TA = −20 to +85°C)
• On-chip high-speed on-chip oscillator clock frequency
correction function
Operating ambient temperature
• TA = -40 to +85°C