▪ 169fs RMS phase jitter at 156.25MHz (typ.)
▪ PCIe® Gen7 Common Clock jitter: 8fs RMS (typ.)
▪ Compliant with ITU-T G.8262 and G.8262.1 for
synchronous Ethernet Equipment Clock
(EEC/eEEC)
▪ Jitter attenuation with programmable loop
bandwidth from 0.1Hz to 12kHz
▪ 1kHz to 650MHz LVDS/LP-HCSL outputs
▪ 1kHz to 200MHz LVCMOS outputs
▪ Simple AC-coupling to LVPECL and CML
▪ Integrated 100 and 85 LP-HCSL terminations
▪ JESD204B/C support on differential or singleended
outputs with DC-coupling or AC-coupling
▪ Up to four single-ended or two differential clock
inputs; one crystal/TCXO/OCXO input
▪ 400kHz I2C / SMBus or 20MHz SPI support
▪ Configuration via factory-programmed One-Time
Programmable (OTP) memory, serial interface, or
external I2C EEPROM
▪ OTP holds up to four complete or 27 partial
configurations
▪ 1.8V, 2.5V, 3.3V, -40° to +85°C operation