1 Features
• AEC-Q100 qualified for automotive applications:
– Temperature grade 1: –40°C to +125°C, TA
• Functional Safety-Capable
– Documentation available to aid functional safety
system design
• Very-low power consumption
– 1mW (typical) at VDD = 5V
• Capable of operation in astable mode
• CMOS output capable of swinging rail to rail
• High-output-current capability
– Sink 100mA (typical)
– Source 10mA (typical)
• Output fully compatible with CMOS, TTL, and
MOS
• Low supply current reduces spikes during output
transitions
• Single-supply operation from 2V to 15V
• Temperature range: –40°C to +125°C
• Functionally interchangeable with the NE555; has
same pinout

2 Applications
• Precision timing
• Pulse generation
• Sequential timing
• Time delay generation
• Pulse width modulation
• Pulse position modulation
• Linear ramp generators
• Automotive lamp and LED lighting
• Telematics

3 Description
The TLC555-Q1 is a monolithic timing circuit
fabricated using TI LinCMOS™ technology. The timer
is fully compatible with CMOS, TTL, and MOS logic
and operates at frequencies up to 2MHz. As a result
of the high input impedance, this device supports
smaller timing capacitors than capacitors used by
the NE555. Thus, more accurate time delays and
oscillations are possible. Power consumption is low
across the full power-supply voltage range.
Like the NE555, the TLC555-Q1 has a trigger level
equal to approximately one-third of the supply voltage,
and a threshold level equal to approximately twothirds
of the supply voltage. These levels can be
altered by using the control voltage pin (CONT).
When the trigger input (TRIG) falls below the trigger
level, the flip-flop is set, and the output goes high.
If TRIG is greater than the trigger level and the
threshold input (THRES) is greater than the threshold
level, the flip-flop is reset and the output goes low.
The reset input (RESET) can override all other inputs
and is used to initiate a new timing cycle. If RESET
is low, the flip-flop is reset and the output goes low.
Whenever the output is low, a low-impedance path
is provided between the discharge pin (DISCH) and
GND. Tie all unused inputs to an appropriate logic
level to prevent false triggering.