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ADS52J91 bảng dữ liệu (PDF) - Texas Instruments

ADS52J91 Datasheet PDF - Texas Instruments
tên linh kiện ADS52J91
tải về  ADS52J91 tải về
kích thước tập tin   453.19 Kbytes
Page   6 Pages
nhà sản xuất  TI2 [Texas Instruments]
Trang chủ  https://www.ti.com
Logo TI2 - Texas Instruments
Giải thích chi tiết về linh kiện ADS52J91 10-Bit, 12-Bit, 14-Bit, Multichannel, Low-Power, High-Speed ADC With LVDS, JESD Outputs

ADS52J91 Datasheet (PDF)

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ADS52J91 Datasheet PDF - Texas Instruments

tên linh kiện ADS52J91
tải về  ADS52J91 Click to download

kích thước tập tin   453.19 Kbytes
Page   6 Pages
nhà sản xuất  TI2 [Texas Instruments]
Trang chủ  https://www.ti.com
Logo TI2 - Texas Instruments
Giải thích chi tiết về linh kiện ADS52J91 10-Bit, 12-Bit, 14-Bit, Multichannel, Low-Power, High-Speed ADC With LVDS, JESD Outputs

ADS52J91 bảng dữ liệu (HTML) - Texas Instruments


ADS52J91 Thông tin chi tiết sản phẩm

1 Features
• 16-Channel ADC configurable to convert
8, 16, or 32 inputs
• Maximum ADC Conversion Rate:
– 125 MSPS in 10-bit mode
– 100 MSPS in 12-bit mode
– 65 MSPS in 14-bit mode
• Supplies: 1.2 V, 1.8 V
• Differential or single-ended input Clock
• Signal-to-noise ratio (SNR):
– 61 dBFS in 10-bit mode
– 69 dBFS in 12-bit mode
– 73.5 dBFS in 14-Bit Mode
• Power at 125 MSPS: 48.6 mW/channel
• 16 ADCs configurable to convert:
– 8 Inputs with a sampling rate of a 2X ADC
conversion rate
– 16 Inputs with a sampling rate of a 1X ADC
conversion rate
– 32 Inputs with a sampling rate of a 0.5X ADC
conversion rate
• 1 Gbps LVDS interface with 16X, 14X, 12X, and
10X serialization
• 5 Gbps JESD interface:
– JESD204B Subclass 0, 1, and 2
– 2, 4, or 8 Channels per JESD lane
• Package: NFBGA-198 (9 mm × 15 mm)

2 Applications
• Ultrasound imaging
• Portable instrumentation
• Sonar and Radar
• High-speed multichannel data acquisition

3 Description
The ADS52J91 is a low-power, high-performance,
16-channel, analog-to-digital converter (ADC). The
conversion rate of each ADC goes up to a maximum
of 125 MSPS in 10-bit mode. The maximum
conversion rate reduces when the ADC resolution is
set to a higher value.
The device can be configured to accept 8, 16, or
32 inputs. In 32-input mode, each ADC alternately
samples and converts two different inputs each at
an effective sampling rate that is half of the ADC
conversion rate. In 8-bit input mode, two ADCs
convert the same input in an interleaved manner,
resulting in an effective sampling rate that is twice the
ADC conversion rate. The ADC is designed to scale
its power with the conversion rate.




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