Features
▪ Electrically screened to DLA SMD 5962-14203
▪ Acceptance tested to 50krad(Si) (LDR) wafer-bywafer
▪ ±1% reference voltage over line, temperature, and
radiation
▪ Integrated MOSFETs 31mΩPFET/21mΩ NFET
• 95% peak efficiency
▪ Externally adjustable loop compensation
▪ Supports DDR applications (VTT tracks VDDQ/2)
• Buffer amplifier for generating VREF voltage
• 3A current sinking capability
• DDR2, DDR3, and DDR4 compatible
▪ Grounded lid eliminates charge build up
▪ IMON pin for output current monitoring
▪ Adjustable analog soft-start
▪ Diode emulation for increased efficiency at light
loads
▪ Monotonic start-up into pre-biased load
▪ Full military temperature range operation
• TA = -55°C to +125°C
• TJ = -55°C to +150°C
▪ TID Rad Hard Assurance (RHA) testing
• HDR (50-300rad(Si)/s): 100krad(Si)
• LDR (0.01rad(Si)/s): 50krad(Si)
▪ SEE characterization (See SEE report)
• DSEE LETTH: 86.4MeV•cm2/mg
• SET at LET 86.4MeV•cm2/mg: <±3% ΔVOUT
• SEFI LETTH: 60MeV•cm2/mg