FEATURES
 Core
 ARM® Cortex® -M0 core running up to 48/72 MHz by internal RC oscillator optioned
from ROMMAP
 One 24-bit system timer
 Supports low power Idle mode
 A single-cycle 32-bit hardware multiplier
 NVIC for the 32 interrupt inputs, each with 4-level of priority
 Supports Serial Wire Debug (SWD) interface and two watch points/four
breakpoints
 Built-in LDO for wide operating voltage ranged: 2.2 V to 5.5 V
 Memory
 64 Kbytes Flash memory for program memory (APROM)
 Configurable Flash memory for data memory (Data Flash)
 7.5 KB Flash memory for loader (LDROM)
 Three 0.5 KB Flash memory for security protection (SPROM0, 1, 2)
 16 KB SRAM for internal scratch-pad RAM (SRAM)
 Clock Control
 Programmable system clock source
 Switch clock sources on-the-fly
 4 ~ 24 MHz external crystal input (HXT)
 32.768 kHz external crystal input (LXT) for idle wake-up and system operation
clock
 48(72) MHz internal oscillator (HIRC) (1% accuracy at 250C, 5V)
 10 kHz internal low-power oscillator (LIRC) for Watchdog Timer and idle wake-up
 I/O Port
 Up to 44 general-purpose I/O (GPIO) pads and 1 Reset pad
 Four I/O modes:
 Quasi-bidirectional input/output
 Push-Pull output
 Open-Drain output
 Input only with high impendence
 Optional TTL/Schmitt trigger input
 I/O pin can be configured as interrupt source with edge/level setting
 Supports high driver and high sink I/O mode
 GPIO built-in Pull-up/Pull-low resistor for selection.
 Timer
Provides four channel 32-bit Timers; one 8-bit pre-scalar counter with 24-bit uptimer
for each timer
 Independent clock source for each timer
 Provides One-shot, Periodic, Toggle and Continuous operation modes
 24-bit up counter value is readable through TDR (Timer Data Register)
 Provides trigger counting/free counting/counter reset function triggered by
external capture pin or internal comparator signal
 Supports event counter function
 Supports Toggle Output mode
 Supports wake-up from Idle or Power-down mode
 Continuous Capture
 Timer0, Timer1, Timer2, Timer3 and Systick provided with continuous capture
function to capture at most 4 edges continuously on one signal
 ECAP (Enhanced Input Capture)
 One units of 24-bit input capture counter
 Capture surce:
 I/O inputs: ECAP ports(ECAP0, ECAP1 and ECAP2)
 ACMP Trigger
 ADC Trigger
 QEI (Quadrature Encoder Interface)
 One unit of Quadrature Encoder Interface with 3 inputs QEI_A, QEI_B and IDX
 WDT (Watchdog Timer)
 Programmable clock source and time-out period
 Supports wake-up function in Power-down mode and Idle mode
 Interrupt or reset selectable on watchdog time-out
 EPWM
 Supports a built-in 16-bit PWM clock generators, providing SIX PWM outputs or
three complementary paired PWM outputs
 Shared same as clock source, clock divider, period and dead-zone generator
 Supports group/independent/complementary modes
 Supports One-shot or Auto-reload mode
 Supports Edge-aligned and Center-aligned type
 Supports Asymmetric mode
 Programmable dead-zone insertion between complementary channels
 Each output has independent polarity setting control
 Hardware fault brake and software brake protections
 Support three of hardware Brake pin
 Supports rising, falling, central, period, and fault break interrupts
 Supports duty/period trigger A/D conversion
 Timer comparing matching event trigger PWM to do phase change
 Supports comparator event trigger PWM to force PWM output low for current
period
 Provides interrupt accumulation function
 BPWM
 One 16-bit PWM generator which supports one 8-bit pre-scalar, one clock divider,
two PWM timers (down counter) and one dead-zone generator
 Two independent outputs or one complementary paired outputs.
 PWM Interrupt request synchronized with PWM period
 Edge-aligned type or Center-aligned type option
 USCI (Universal Serial Control Interface Controller)
 Three USCI devices
 USCI0 & USCI1 Supports to be configured as UART, SPI or I²C individually
 USCI2 Supports to be configured as UART and I²C individually
 Supports programmable baud-rate generator
 ADC (Analog-to-Digital Converter)
 12-bit ADC with 1us conversion time
 Supports 2 sample/hold
 Up to 16-ch single-end input from I/O and one internal input from band-gap.
 Conversion started either by software trigger, PWM trigger, ACMP trigger or
external pin trigger
 Supports temperature sensor for measurement chip temperature
 Supports Simultaneous and Sequential function to continuous conversion 4
channels maximum.
 Programmable Gain Amplifier (PGA)
 Supports 8 level gain selects from 1, 2, 3, 5, 7, 9, 11 and 13.
 Unity gain frequency up to 6 MHz
 OP Amplifier
 Rail-to-rail OPA x 3
 DAC
 Built-in two of 12-bit DAC,
 Be the reference voltage for ACMP, PGA, ADC or output to pins.
 Analog Comparator
 Two analog comparators with 4 reference voltage source
 Programmable 16-level resistor ladders (CRV)
 Built-in 12-bit DAC for comparator reference voltage
 Band-gap voltage
 External voltage from port pin
 Supports Hysteresis function 0/20/90/150mV at VDD = 5V
 Interrupt when compared results changed
 Hardware Divider
 Signed (two’s complement) integer calculation
 32-bit dividend with 16-bit divisor calculation capacity
 32-bit quotient and 32-bit remainder outputs (16-bit remainder with sign extends
to 32-bit)
 Divided by zero warning flag
 6 HCLK clocks taken for one cycle calculation
 Waiting for calculation ready automatically when reading quotient and remainder
 Support 3 group of independent dividend, divisor, quotient and remainder
registers for three times of calculation capacity
 ISP (In-System Programming) and ICP (In-Circuit Programming)
 BOD (Brown-out Detector)
 8 programmable threshold levels: 4.3V/4.0V/3.7V/3.0V/2.7V/2.4V/2.2V/2.0V
 Supports Brown-out interrupt and reset option
 96-bit unique ID
 LVR (Low Voltage Reset)
 Operating Temperature: -40℃~105℃
 Reliability: EFT > ± 4KV, ESD HBM pass 4KV
 Packages:
 48-pin LQFP(7x7mm), 48-pin QFN(7x7mm)
 Package is Halogen-free, RoHS-compliant and TSCA-compliant.