SUMMARY DESCRIPTION
The M68AW511A is a 4 Mbit (4,194,304 bit) CMOS SRAM, organized as 524,288 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal address access and cycle times. It requires a single 2.7 to 3.6V supply.

FEATURES SUMMARY
■ SUPPLY VOLTAGE: 2.7 to 3.6V
■ 512K x 8 bits SRAM with OUTPUT ENABLE
■ EQUAL CYCLE and ACCESS TIMES: 55ns
■ LOW STANDBY CURRENT
■ LOW VCC DATA RETENTION: 1.5V
■ TRI-STATE COMMON I/O
■ LOW ACTIVE and STANDBY POWER