DESCRIPTION
The TH58BVG3S0HTAI0 is a single 3.3V 8Gbit (8,858,370,048 bits) NAND Electrically Erasable and
Programmable Read-Only Memory (NAND E2PROM) organized as (4096 + 128) bytes × 64 pages × 4096 blocks.
The device has a 4224-byte static register which allows program and read data to be transferred between the register
and the memory cell array in 4224-bytes increments. The Erase operation is implemented in a single block unit
(256 Kbytes + 8 Kbytes: 4224 bytes × 64 pages).
The TH58BVG3S0HTAI0 is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
The TH58BVG3S0HTAI0 has ECC logic on the chip and 8bit read errors for each 528Bytes can be corrected
internally.

FEATURES
• Organization
x8
Memory cell array 4224 × 128K × 8 × 2
Register 4224 × 8
Page size 4224 bytes
Block size (256K + 8K) bytes
• Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,
Multi Page Read, Multi Page Program, Multi Block Erase, ECC Status Read
• Mode control
Serial input/output
Command control
• Number of valid blocks
Min 4016 blocks
Max 4096 blocks
• Power supply
VCC = 2.7V to 3.6V
• Access time
Cell array to register 55 μs typ. (Single Page Read) / 90 μs typ. (Multi Page Read)
Read Cycle Time 25 ns min (CL=50pF)
• Program/Erase time
Auto Page Program 340 μs/page typ.
Auto Block Erase 2.5 ms/block typ.
• Operating current
Read (25 ns cycle) 30 mA max
Program (avg.) 30 mA max
Erase (avg.) 30 mA max
Standby 100 μA max
• Package
TSOP I 48-P-1220-0.50 (Weight: 0.54 g typ.)
• 8bit ECC for each 528Byte is implemented on the chip.