# SN54HC74 / SN74HC74 Dual D-Type Positive-Edge-Triggered Flip-Flops

## Features & Overview
️· Function: Dual D-type positive-edge-triggered flip-flops with clear and preset.
️· Logic: Low level on PRE or CLR sets/resets outputs regardless of other inputs. Data transferred on rising edge of CLK when PRE & CLR are inactive.
️· Applications: General-purpose logic, data storage, shift registers.

## Electrical Characteristics
️· Supply Voltage (VCC): 2V to 6V
️· Input Voltage (VI): 0V to VCC
️· Output Voltage (VO): 0V to VCC
️· Operating Temperature: -40°C to 85°C (SN74HC74) / -55°C to 125°C (SN54HC74)
️· Maximum Clock Frequency: Up to 60 MHz (depending on VCC)

## Package Options
️· FK (CQCC)
️· DB (PDSO)
️· PW (PDSO)
️· Various others (CDIP, CFP, LCCC, etc.)

## Ordering Information
️· Multiple package and temperature range options available.
️· Refer to datasheet for specific part numbers.

## Key Parameters
️· tpd (Propagation Delay): Typically 15ns (at VCC=5V)
️· Input Current: 1µA max
️· Output Drive: ±4mA at 5V
️· Power Consumption: Low (40µA max ICC)

## Absolute Maximum Ratings
️· VCC: -0.5V to 7V
️· Input Clamp Current: ±20mA
️· Output Clamp Current: ±20mA

## Logic Diagram
️· Standard positive logic flip-flop configuration with D, CLK, PRE, CLR, Q, and Q outputs.

## Package Dimensions
️· Detailed mechanical drawings for each package type are provided.