1. Overall Purpose:

️· The document describes the GD25LQ80C Serial Flash memory, outlining its features, operation, and status register details.

2. Key Features & Modes:

️· Quad Mode: Enables Quad I/O operation for faster data transfers (controlled by the QE bit in the Status Register).
️· Block Protection: Allows protection of memory areas from Program and Erase commands (BP4-BP0 bits).
️· Status Register Protection (SRP1, SRP0): Controls how the Status Register itself can be written to. Options include:
- Software Protection (default)
- Hardware Protection (requires WP# to be low)
- Hardware Unprotected (requires WP# to be high)
- Power Supply Lock-Down (requires power cycle to reset)
- One-Time Programmable (permanent protection - special order)
️· Security Registers: Controlled by LB3, LB2, LB1 bits (OTP). Default state unlocks security registers. Setting these bits to 1 makes the registers read-only permanently.