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R5F56519FDFP bảng dữ liệu(PDF) 171 Page - Renesas Technology Corp |
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R5F56519FDFP bảng dữ liệu(HTML) 171 Page - Renesas Technology Corp |
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171 / 190 page ![]() R01DS0276EJ0100 Rev.1.00 Page 171 of 190 Aug 24, 2016 RX65N Group, RX651 Group 5. Electrical Characteristics Figure 5.71 DP and DM Output Timing (Full-Speed) Figure 5.72 Test Circuit (Full-Speed) Table 5.42 On-Chip USB Full-Speed Characteristics (DP and DM Pin Characteristics) Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 3.0 to 3.6 V, 3.0 ≤ VREFH0 ≤ AVCC0, VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V, UCLK = 48 MHz, PCLKA = 8 to 120 MHz, PCLKB = 8 to 60 MHz, Ta = Topr Item Symbol Min. Typ. Max. Unit Test Conditions Input characteristics Input high level voltage VIH 2.0 — — V Input low level voltage VIL —— 0.8 V Differential input sensitivity VDI 0.2 — — V | DP – DM | Differential common mode range VCM 0.8 — 2.5 V Output characteristics Output high level voltage VOH 2.8 — 3.6 V IOH = –200 μA Output low level voltage VOL 0.0 — 0.3 V IOL = 2 mA Cross-over voltage VCRS 1.3 — 2.0 V Figure 5.71 Rise time tFR 4 — 20 ns Fall time tFF 4 — 20 ns Rise/fall time ratio tFR / tFF 90 — 111.11 % tFR/ tFF Output resistance ZDRV 28 — 44 Ω Rs = 27 Ω included Pull-up and pull-down characteristics DP pull-up resistance (when the function controller function is selected) Rpu 0.900 — 1.575 k Ω Idle state 1.425 — 3.090 k Ω At transmission and reception DP/DM pull-down resistance (when the host controller function is selected) Rpd 14.25 — 24.80 k Ω DP, DM tFF tFR 90% 10% 10% 90% VCRS Observation point 50 pF 50 pF dp dm 27 27 |
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