HT67F488 datasheet(126/171 Pages) HOLTEK

126 / 171 page

Rev. 1.60

1�6

�ove��e� �� 016

HT67F488/HT67F489

TinyPowerTM A/D Flash MCU with LCD & EEPROM

UART Module Interrupt Structure

SeveralindividualUARTconditionscangenerateaUARTinterrupt.Whentheseconditionsexist,

alowpulsewillbegeneratedtogettheattentionofthemicrocontroller.Theseconditionsarea

transmitterdataregisterempty,transmitteridle,receiverdataavailable,receiveroverrun,address

detectandanRXpinwake-up.Whenanyoftheseconditionsarecreated,ifitscorresponding

interruptcontrolisenabledandthestackisnotfull,theprogramwilljumptoitscorresponding

interruptvectorwhereitcanbeservicedbeforereturningtothemainprogram.Fourofthese

conditionshavethecorrespondingUSRregisterflagswhichwillgenerateaUARTinterruptifits

associatedinterruptenablecontrolbitintheUCR2registerisset.Thetwotransmitterinterrupt

conditionshavetheirowncorrespondingenablecontrolbits,whilethetworeceiverinterrupt

conditionshaveasharedenablecontrolbit.Theseenablebitscanbeusedtomaskoutindividual

UARTinterruptsources.

Theaddressdetectcondition,whichisalsoaUARTinterruptsource,doesnothaveanassociated

flag,butwillgenerateaUARTinterruptwhenanaddressdetectconditionoccursifitsfunction

isenabledbysettingtheADDENbitintheUCR2register.AnRXpinwake-up,whichisalsoa

UARTinterruptsource,doesnothaveanassociatedflag,butwillgenerateaUARTinterruptifthe

microcontrolleriswokenupbyafallingedgeontheRXpin,iftheWAKEandRIEbitsintheUCR

registerareset.NotethatintheeventofanRXwake-upinterruptoccurring,therewillbeacertain

periodofdelay,commonlyknownastheSystemStart-upTime,fortheoscillatortorestartand

stabilizebeforethesystemresumesnormaloperation.

NotethattheUSRregisterflagsarereadonlyandcannotbeclearedorsetbytheapplication

program,neitherwilltheybeclearedwhentheprogramjumpstothecorrespondinginterrupt

servicingroutine,asisthecaseforsomeoftheotherinterrupts.Theflagswillbecleared

automaticallywhencertainactionsaretakenbytheUART,thedetailsofwhicharegiveninthe

UARTregistersection.TheoverallUARTinterruptcanbedisabledorenabledbytherelated

interruptenablecontrolbitsintheinterruptcontrolregistersofthemicrocontrollertodecidewhether

theinterruptrequestedbytheUARTmoduleismaskedoutorallowed.

T�ans�itte� E�pty

Flag TXIF

USR Registe�

T�ans�itte� Idle

Flag TIDLE

Receive� Ove��un

Flag OERR

Receive� Data

Availa�le RXIF

ADDE�

RX Pin

Wake-up

WAKE

RX7 if B�O=0

RX8 if B�O=1

UCR� Registe�

RIE

TIIE

TEIE

UART Inte��upt

Request Flag

UARF

UCR� Registe�

UARE

I�TC�

Registe�

EMI

I�TC0

Registe�

UART Interrupt Scheme

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