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STM32F769AI bảng dữ liệu(PDF) 168 Page - STMicroelectronics

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STM32F769AI bảng dữ liệu(HTML) 168 Page - STMicroelectronics

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Electrical characteristics
STM32F765xx STM32F767xx STM32F768Ax STM32F769xx
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DocID029041 Rev 4
5.3.21
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 65: I/O static characteristics).
Unless otherwise specified, the parameters given in Table 68 are derived from tests
performed under the ambient temperature and VDD supply voltage conditions summarized
in Table 17.
Figure 40. Recommended NRST pin protection
1. The reset network protects the device against parasitic resets.
2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 68. Otherwise the reset is not taken into account by the device.
Table 68. NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RPU
Weak pull-up equivalent resistor(1)
VIN = VSS
30
40
50
k
Ω
VF(NRST)(2) NRST Input filtered pulse
-
-
-
100
ns
VNF(NRST)(2) NRST Input not filtered pulse
VDD > 2.7 V
300
-
-
ns
TNRST_OUT Generated reset pulse duration
Internal Reset source
20
-
-
μs
1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance must be minimum
(~10% order)
.
2. Guaranteed by design.



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