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ST72561AR7-Auto bảng dữ liệu(PDF) 264 Page - STMicroelectronics

tên linh kiện ST72561AR7-Auto
Giải thích chi tiết về linh kiện  Clock, reset and supply management
PDF  324 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561AR7-Auto bảng dữ liệu(HTML) 264 Page - STMicroelectronics

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Instruction set
ST72561-Auto
264/324
Doc ID 12370 Rev 8
19
Instruction set
19.1
CPU addressing modes
The CPU features 17 different addressing modes which can be classified in seven main
groups:
The CPU Instruction set is designed to minimize the number of bytes required per
instruction: To do so, most of the addressing modes may be subdivided in two submodes
called long and short:
●
Long addressing mode is more powerful because it can use the full 64 Kbyte address
space, however it uses more bytes and more CPU cycles.
●
Short addressing mode is less powerful because it can generally only access page
zero (0000h - 00FFh range), but the instruction size is more compact, and faster. All
memory to memory instructions use short addressing modes only (CLR, CPL, NEG,
BSET, BRES, BTJT, BTJF, INC, DEC, RLC, RRC, SLL, SRL, SRA, SWAP)
The ST7 Assembler optimizes the use of long and short addressing modes.
Table 94.
Addressing mode groups
Addressing mode
Example
Inherent
nop
Immediate
ld A, #$55
Direct
ld A, $55
Indexed
ld A, ($55,X)
Indirect
ld A, ([$55],X)
Relative
jrne loop
Bit operation
bset
byte, #5
Table 95.
CPU addressing mode overview
Mode
Syntax
Destination
Pointer
address
(hex.)
Pointer
size
(hex.)
Length
(bytes)
Inherent
nop
+ 0
Immediate
ld A, #$55
+ 1
Short
Direct
ld A, $10
00..FF
+ 1
Long
Direct
ld A, $1000
0000..FFFF
+ 2
No Offset
Direct
Indexed ld A, (X)
00..FF
+ 0
Short
Direct
Indexed ld A, ($10,X)
00..1FE
+ 1
Long
Direct
Indexed ld A, ($1000,X)
0000..FFFF
+ 2
Short
Indirect
ld A, [$10]
00..FF
00..FF
byte
+ 2
Long
Indirect
ld A, [$10.w]
0000..FFFF
00..FF
word
+ 2



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