ST72561AR7-Auto datasheet(223/324 Pages) STMICROELECTRONICS

223 / 324 page

ST72561-Auto

beCAN controller (beCAN)

Doc ID 12370 Rev 8

223/324

managed completely by hardware. The application accesses the messages stored in the

FIFO through the FIFO output mailbox.

Valid message

A received message is considered as valid when it has been received correctly according to

the CAN protocol (no error until the last but one bit of the EOF field) and It passed through

the identifier filtering successfully, see Identifier filtering.

Figure 101. Receive FIFO states

FIFO management

Starting from the empty state, the first valid message received is stored in the FIFO which

becomes pending_1. The hardware signals the event setting the FMP[1:0] bits in the CRFR

reads out the mailbox content and releases it by setting the RFOM bit in the CRFR register.

The FIFO becomes empty again. If a new valid message has been received in the

meantime, the FIFO stays in pending_1 state and the new message is available in the

output mailbox.

If the application does not release the mailbox, the next valid message will be stored in the

FIFO which enters pending_2 state (FMP[1:0] = 10b). The storage process is repeated for

the next valid message putting the FIFO into pending_3 state (FMP[1:0] = 11b). At this point,

EMPTY

Valid Message

FMP=0x00

FOVR=0

PENDING_1

FMP=0x01

FOVR=0

Received

PENDING_2

FMP=0x10

FOVR=0

PENDING_3

FMP=0x11

FOVR=0

Valid Message

Received

Release

OVERRUN

FMP=0x11

FOVR=1

Mailbox

Release

Mailbox

Valid Message

Received

Valid Message

Received

Release

Mailbox

Release

Mailbox

Valid Message

Received

RFOM=1

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