ST72561J4-Auto datasheet(197/324 Pages) STMICROELECTRONICS

tên linh kiện	ST72561J4-Auto

Giải thích chi tiết về linh kiện	Clock, reset and supply management

PDF	324 Pages

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nhà sản xuất	STMICROELECTRONICS [STMicroelectronics]

Trang chủ	http://www.st.com

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ST72561-Auto

LINSCI serial communication interface (LIN master only)

Doc ID 12370 Rev 8

197/324

Figure 88.

SCI block diagram

16.4

Functional description

The block diagram of the serial control interface, is shown in Figure 88. It contains seven

dedicated registers:

●

Three control registers (SCICR1, SCICR2 and SCICR3)

●

A status register (SCISR)

●

A baud rate register (SCIBRR)

●

An extended prescaler receiver register (SCIERPR)

●

An extended prescaler transmitter register (SCIETPR)

WAKE

UNIT

RECEIVER

CONTROL

SCISR

TRANSMIT

CONTROL

TDRE TC RDRF IDLE

SCI

CONTROL

INTERRUPT

SCICR1

WAKE

Received Data Register (RDR)

Received Shift Register

Read

Transmit Data Register (TDR)

Transmit Shift Register

Write

RDI

TDO

(DATA REGISTER) SCIDR

TRANSMITTER

CLOCK

RECEIVER

CLOCK

RECEIVER RATE

TRANSMITTER RATE

SCIBRR

SCP1

fCPU

CONTROL

SCP0 SCT2 SCT1 SCT0 SCR2 SCR1SCR0

/PR

/16

CONVENTIONAL BAUD RATE GENERATOR

SBK

RWU

ILIE

RIE

TCIE

TIE

SCICR2

SCICR3

LINE

CPOL CPHA LBCL

CLOCK EXTRACTION

PHASE AND POLARITY

CONTROL

SCLK

SCID

PCE

PIE

CLKEN

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